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Re: [Xen-devel] [PATCH RFC 4/4] xen: use per-vcpu TSS and stacks for pv domains

On 09/01/18 19:39, Juergen Gross wrote:
> On 09/01/18 20:13, Andrew Cooper wrote:
>> (sorry for the top-post. I'm on my phone) 
>> I can see you are using ltr, but I don't see anywhere where where you are 
>> changing the content on the TSS, or the top-of-stack content.
> The per-vcpu TSS is already initialized with the correct stack
> addresses, so it doesn't have to be modified later.
>> It is very complicated to safely switch IST stacks when you might be taking 
>> interrupts.
> Using LTR with a new TSS with both stack areas mapped (old and new)
> should work, right?

The top-of-stack block has pcpu information on it, including
smp_processor_id() and pervcpu_offset.  Switching the cr4 shadow without
hitting an assert is tricky, and was left with a rather large RFC/TODO
in my pre-kaiser series.

The syscall stubs contain absolute stack references in them, so at a
minimum they also need rewriting on context switch.


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