Re: [Xen-devel] [PATCH 3/3] x86: avoid FS/GS base reads when possible

[Andrew Cooper <andrew.cooper3@xxxxxxxxxx>]

On 20/10/17 15:24, Jan Beulich wrote:
> They're being zeroed a few lines down when non-null selectors are being
> found in the respective registers.
>
> Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx>

Given that this is within an cpu_has_fsgsbase conditional, there is a
moderate chance that the conditional is more overhead than the
rd{fs,gs}base instruction alone.

ISTR Andy Lutomirsky finding that they were actually very efficient
instructions.

I'm not sure which is the better option here, but I'm not aversed to the
change, so Acked-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>

>
> --- a/xen/arch/x86/domain.c
> +++ b/xen/arch/x86/domain.c
> @@ -1449,10 +1449,11 @@ static void save_segments(struct vcpu *v
>  
>      if ( cpu_has_fsgsbase && !is_pv_32bit_vcpu(v) )
>      {
> -        v->arch.pv_vcpu.fs_base = __rdfsbase();
> +        if ( !(regs->fs & ~3) )
> +            v->arch.pv_vcpu.fs_base = __rdfsbase();
>          if ( v->arch.flags & TF_kernel_mode )
>              v->arch.pv_vcpu.gs_base_kernel = __rdgsbase();
> -        else
> +        else if ( !(regs->gs & ~3) )
>              v->arch.pv_vcpu.gs_base_user = __rdgsbase();
>      }
>  
>
>
>


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