Re: [Xen-devel] [PATCH v3 1/3] arm: processor: add new struct hsr_smc32 into hsr union

[Julien Grall <julien.grall@xxxxxxx>]

Hi Volodymyr,

On 14/08/17 18:15, Volodymyr Babchuk wrote:
> On ARMv8, one of conditional exceptions (SMC that originates
> from AArch32 state) has extra field in HSR.ISS encoding:
>
> CCKNOWNPASS, bit [19]
> Indicates whether the instruction might have failed its condition
> code check.
>    0 - The instruction was unconditional, or was conditional and
>    passed  its condition code check.
>    1 - The instruction was conditional, and might have failed its
>    condition code check.
> (ARM DDI 0487B.a page D7-2272)
>
> This is an instruction specific field, so better to add new structure
> to union hsr. This structure describes ISS encoding for an exception
> from SMC instruction executing in AArch32 state. But we define this
> struct for both ARMv7 and ARMv8, because ARMv8 encoding is backwards
> compatible with ARMv7.
>
> Signed-off-by: Volodymyr Babchuk <volodymyr_babchuk@xxxxxxxx>
Acked-by: Julien Grall <julien.grall@xxxxxxx>

Cheers,

--
Julien Grall

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