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Re: [Xen-devel] PCI passthrough of USB controllers on Xen 4.8.1, Linux 4.9.29, stubdomain



On Tue, Jun 06, 2017 at 02:37:01AM -0600, Jan Beulich wrote:
> >>> On 02.06.17 at 12:57, <marmarek@xxxxxxxxxxxxxxxxxxxxxx> wrote:
> > And in this case, dom0 also prints:
> > 
> >     [   49.155606] pciback 0000:00:14.0: Driver tried to write to a 
> > read-only configuration space field at offset 0x82, size 2. This may be 
> > harmless, but if you have problems with your device:
> >                    1) see permissive attribute in sysfs
> >                    2) report problems to the xen-devel mailing list along 
> > with details of your device obtained from lspci.
> >     [   66.247644] pciback 0000:00:14.0: cache line size of 64 is not 
> > supported
> >     [   66.247646] xen_pciback: 0000:00:14.0: cannot enable 
> > memory-write-invalidate (-22)
> > 
> > Enabling permissive mode doesn't change anything.
> 
> I doubt this - the first of the messages won't be logged in permissive
> mode.

Yes, of course. But the other lines and overall effect is the same.

> We'll also need to know what register there is at address 0x82
> (possibly visible from a sufficiently verbose lspci in Dom0).
> 
> As to the latter two - lspci output may also help understand
> what the issue with cache line size here is. A second source of
> information may be lspci output for the device with its normal
> driver loaded and attached in Dom0.

Below is lspci of those two devices, in dom0, with normal driver
attached. Would lspci from domU be useful too?

[root@dom0 ~]# lspci -s 00:1d.0 -vvv
00:1d.0 USB controller: Intel Corporation Wildcat Point-LP USB EHCI Controller 
(rev 03) (prog-if 20 [EHCI])
        Subsystem: Intel Corporation Device 7270
        Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- 
Stepping- SERR- FastB2B- DisINTx-
        Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- 
<TAbort- <MAbort- >SERR- <PERR- INTx-
        Interrupt: pin A routed to IRQ 23
        Region 0: Memory at b221a000 (32-bit, non-prefetchable) [disabled] 
[size=1K]
        Capabilities: [50] Power Management version 3
                Flags: PMEClk- DSI- D1- D2- AuxCurrent=375mA 
PME(D0+,D1-,D2-,D3hot+,D3cold+)
                Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
        Capabilities: [58] Debug port: BAR=1 offset=00a0
        Capabilities: [98] PCI Advanced Features
                AFCap: TP+ FLR+
                AFCtrl: FLR-
                AFStatus: TP-
        Kernel modules: ehci_pci

[root@dom0 ~]# lspci -s 00:14.0 -vvv
00:14.0 USB controller: Intel Corporation Wildcat Point-LP USB xHCI Controller 
(rev 03) (prog-if 30 [XHCI])
        Subsystem: Intel Corporation Device 7270
        Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- 
Stepping- SERR- FastB2B- DisINTx+
        Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- 
<TAbort- <MAbort- >SERR- <PERR- INTx-
        Latency: 0
        Interrupt: pin A routed to IRQ 170
        Region 0: Memory at b2200000 (64-bit, non-prefetchable) [size=64K]
        Capabilities: [70] Power Management version 2
                Flags: PMEClk- DSI- D1- D2- AuxCurrent=375mA 
PME(D0-,D1-,D2-,D3hot+,D3cold+)
                Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
        Capabilities: [80] MSI: Enable+ Count=1/8 Maskable- 64bit+
                Address: 00000000fee00338  Data: 0000
        Kernel driver in use: xhci_hcd
        Kernel modules: xhci_pci


-- 
Best Regards,
Marek Marczykowski-Górecki
Invisible Things Lab
A: Because it messes up the order in which people normally read text.
Q: Why is top-posting such a bad thing?

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