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[Xen-devel] [RFC PATCH 2/4] arm/mem_access: Change value of TTBCR_SZ_MASK



The TTBCR_SZ holds only 3 bits and thus must be masked with the value
0x7 instead of the previously used value 0xf.

Signed-off-by: Sergej Proskurin <proskurin@xxxxxxxxxxxxx>
---
Cc: Stefano Stabellini <sstabellini@xxxxxxxxxx>
Cc: Julien Grall <julien.grall@xxxxxxx>
---
 xen/include/asm-arm/processor.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/xen/include/asm-arm/processor.h b/xen/include/asm-arm/processor.h
index 4fdf86070b..c8b8cff311 100644
--- a/xen/include/asm-arm/processor.h
+++ b/xen/include/asm-arm/processor.h
@@ -94,7 +94,7 @@
 #define TTBCR_N_2KB  _AC(0x03,U)
 #define TTBCR_N_1KB  _AC(0x04,U)
 
-#define TTBCR_SZ_MASK   0xf
+#define TTBCR_SZ_MASK   _AC(0x7,UL)
 
 /* SCTLR System Control Register. */
 /* HSCTLR is a subset of this. */
-- 
2.12.2


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