[Xen-devel] [PATCH for-next 0/6] vpci: initial PCI config space traps

[Roger Pau Monne <roger.pau@xxxxxxxxxx>]

Hello,

The following series contain an implementation of handlers for the PCI
configuration space inside of Xen. This allows Xen to detect accesses to the
PCI configuration space and react accordingly.

I'm still not sure that the interface for the handlers is the final one, right
now only some basic handlers are implemented (header and capability list),
other maybe more complex handlers (MSI/MSI-X) might need to expand the
interface.

Patches #1 and #2 are preparatory, and are not specific to vpci (mostly code
movement or split). The meat is certainly in patch #3 that implements the
generic handlers for accesses to the PCI configuration space. Currently a
per-device red-back tree is used in order to store the list of handlers, and
they are indexed based on their offset inside of the configuration space. Patch
#3 also adds the x86 port IO traps and wires them into the newly introduced
vPCI dispatchers. Patch #4 adds handlers for the ECAM areas (as found on the
MMCFG ACPI table). Patch #5 adds handlers to the PCI header in order to detect
BAR related operations (size, position change) and reacts accordingly to them.
Finally patch #6 allows Xen to mask certain features listed in the
capabilities list of each PCI device, allowing Xen to mask the MSI/MSI-X
features, so that the panic in the PVH Dom0 builder can be replaced with a
printk instead. Note that PVH Dom0 is still missing a lot of functionality, but
this should hopefully be enough to boot on simple hardware.

This series is based on top of my previous "x86/dpci: bind legacy PCI
interrupts to PVHv2 Dom0", which has been rebased on top of the clang fix. The
full dependency can be seen at:

http://xenbits.xen.org/gitweb/?p=people/royger/xen.git;a=shortlog;h=refs/heads/vpci_v1
git://xenbits.xen.org/people/royger/xen.git vpci_v1

Note that this is only safe to use for the hardware domain (that's trusted),
any non-trusted domain will need a lot more of traps before it can freely
access the PCI configuration space.

Thanks, Roger.

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