Re: [Xen-devel] [PATCH v3 0/3] x86/vmx: fix for vmentry failure with TSX bits in LBR

[Andrew Cooper <andrew.cooper3@xxxxxxxxxx>]

On 23/02/17 09:33, Sergey Dyasli wrote:
> The first 2 patches is a general optimization which is nice to have
> prior to the 3rd patch which contains the real fix.
>
> A similar bug was fixed in Linux's perf subsystem in Jun 2016:
>
>     commit 19fc9ddd61e059cc45464bdf6e8fa304bb94080f
>     ("perf/x86/intel: Fix MSR_LAST_BRANCH_FROM_x bug when no TSX")
>
> But the issue affects virtualized systems in a more severe way since
> all LBR entries have to be fixed during vmentry.
>
> <snip>
>
> Sergey Dyasli (3):
>   x86/vmx: introduce vmx_find_msr()
>   x86/vmx: optimize vmx_read/write_guest_msr()
>   x86/vmx: fix vmentry failure with TSX bits in LBR

Pushed, thanks.

There is a separate bug to do with the order of microcode loading and
collection of cpuid features.  At the moment, if microcode ends up
disabling TSX/HLE, Xen's BSP features still see them as present at the
point that lbr_tsx_fixup_check() is called.

In some copious free time, I will see about loading microcode earlier
(Linux loads it out of the trampoline for APs), and trying to load the
BSP microcode before feature evaluation occurs.

~Andrew

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