Re: [Xen-devel] [PATCH v2 09/10] xen/tools: tracing: trace (Credit2) runq traversal.

[Dario Faggioli <dario.faggioli@xxxxxxxxxx>]

On Wed, 2017-02-15 at 15:31 +0000, George Dunlap wrote:
> On Thu, Feb 9, 2017 at 1:59 PM, Dario Faggioli
> <dario.faggioli@xxxxxxxxxx> wrote:
> > 
> > When traversing a Credit2 runqueue to select the
> > best candidate vCPU to be run next, show in the
> > trace which vCPUs we consider.
> > 
> > A bit verbose, but quite useful, considering that
> > we may end up looking at, but then discarding, one
> > of more vCPU. This will help understand which ones
> > are skipped and why.
> 
> This sounds useful -- but what I don't quite understand is why it's
> useful simply to know that a vcpu was considered, and not also know
> specifically why it was decided against.  (I'm sure you've found it
> useful or you wouldn't have submitted the patch.)
> 
Yeah, I see what you mean.

Of course, the more info, the better. But knowing which vcpus have been
skipped, is the real hard thing here. Meaning that it, in theory, was
possible to reconstruct that, but only with a very tedious and error
prone process of staring and noting down previous records.

OTOH, once that you see which ones have been skipped --considering that
there are not too many reasons for that to happen, yet-- it's fairly
straightforward to guess why.

And yes, as you say, I so far have found more useful to know which
ones, while the why hasn't been critical for the trace analysis I've
done so far.

> Anyway, I can check it in as-is (if it applies).
> 
> Acked-by: George Dunlap <george.dunlap@xxxxxxxxxx>
> 
Thanks, and fear not: I actually may end up sending a follow up patch
for spitting out the reason why we skipped someone too... As you
probably have understood by this point, I like a lot adding
tracepoints! :-P :-P

Regards,
Dario
-- 
<<This happens because I choose it to happen!>> (Raistlin Majere)
-----------------------------------------------------------------
Dario Faggioli, Ph.D, http://about.me/dario.faggioli
Senior Software Engineer, Citrix Systems R&D Ltd., Cambridge (UK)

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