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[Xen-devel] [PATCH 2/7] x86_emulate: lift a bunch of macros to header file

To: Xen-devel <xen-devel@xxxxxxxxxxxxxxxxxxxx>

Date: Wed, 25 Jan 2017 15:44:11 +0000

Cc: George Dunlap <george.dunlap@xxxxxxxxxxxxx>, Andrew Cooper <andrew.cooper3@xxxxxxxxxx>, Ian Jackson <Ian.Jackson@xxxxxxxxxxxxx>, Wei Liu <wei.liu2@xxxxxxxxxx>, Jan Beulich <JBeulich@xxxxxxxx>

Delivery-date: Wed, 25 Jan 2017 15:44:25 +0000

List-id: Xen developer discussion <xen-devel.lists.xen.org>

Some of them can be shared between hypervisor and userspace fuzzing / test code. Instead of lifting the ones as we need, lift them all. And then remove the ones in test program. Signed-off-by: Wei Liu <wei.liu2@xxxxxxxxxx> --- tools/tests/x86_emulator/test_x86_emulator.c | 9 --- xen/arch/x86/x86_emulate/x86_emulate.c | 85 --------------------------- xen/arch/x86/x86_emulate/x86_emulate.h | 86 ++++++++++++++++++++++++++++ 3 files changed, 86 insertions(+), 94 deletions(-) diff --git a/tools/tests/x86_emulator/test_x86_emulator.c b/tools/tests/x86_emulator/test_x86_emulator.c index e86369ffe7..579b28c687 100644 --- a/tools/tests/x86_emulator/test_x86_emulator.c +++ b/tools/tests/x86_emulator/test_x86_emulator.c @@ -23,15 +23,6 @@ static const struct { #endif }; -/* EFLAGS bit definitions. */ -#define EFLG_OF (1<<11) -#define EFLG_DF (1<<10) -#define EFLG_SF (1<<7) -#define EFLG_ZF (1<<6) -#define EFLG_AF (1<<4) -#define EFLG_PF (1<<2) -#define EFLG_CF (1<<0) - static unsigned int bytes_read; static int read( diff --git a/xen/arch/x86/x86_emulate/x86_emulate.c b/xen/arch/x86/x86_emulate/x86_emulate.c index 21dd98cebc..fd61dd8384 100644 --- a/xen/arch/x86/x86_emulate/x86_emulate.c +++ b/xen/arch/x86/x86_emulate/x86_emulate.c @@ -415,91 +415,6 @@ typedef union { # define ASM_FLAG_OUT(yes, no) no #endif -/* MSRs. */ -#define MSR_TSC 0x00000010 -#define MSR_SYSENTER_CS 0x00000174 -#define MSR_SYSENTER_ESP 0x00000175 -#define MSR_SYSENTER_EIP 0x00000176 -#define MSR_DEBUGCTL 0x000001d9 -#define DEBUGCTL_BTF (1 << 1) -#define MSR_BNDCFGS 0x00000d90 -#define BNDCFG_ENABLE (1 << 0) -#define BNDCFG_PRESERVE (1 << 1) -#define MSR_EFER 0xc0000080 -#define MSR_STAR 0xc0000081 -#define MSR_LSTAR 0xc0000082 -#define MSR_CSTAR 0xc0000083 -#define MSR_FMASK 0xc0000084 -#define MSR_TSC_AUX 0xc0000103 - -/* Control register flags. */ -#define CR0_PE (1<<0) -#define CR0_MP (1<<1) -#define CR0_EM (1<<2) -#define CR0_TS (1<<3) - -#define CR4_VME (1<<0) -#define CR4_PVI (1<<1) -#define CR4_TSD (1<<2) -#define CR4_OSFXSR (1<<9) -#define CR4_OSXMMEXCPT (1<<10) -#define CR4_UMIP (1<<11) -#define CR4_FSGSBASE (1<<16) -#define CR4_OSXSAVE (1<<18) - -/* EFLAGS bit definitions. */ -#define EFLG_ID (1<<21) -#define EFLG_VIP (1<<20) -#define EFLG_VIF (1<<19) -#define EFLG_AC (1<<18) -#define EFLG_VM (1<<17) -#define EFLG_RF (1<<16) -#define EFLG_NT (1<<14) -#define EFLG_IOPL (3<<12) -#define EFLG_OF (1<<11) -#define EFLG_DF (1<<10) -#define EFLG_IF (1<<9) -#define EFLG_TF (1<<8) -#define EFLG_SF (1<<7) -#define EFLG_ZF (1<<6) -#define EFLG_AF (1<<4) -#define EFLG_PF (1<<2) -#define EFLG_MBS (1<<1) -#define EFLG_CF (1<<0) - -/* Floating point status word definitions. */ -#define FSW_ES (1U << 7) - -/* MXCSR bit definitions. */ -#define MXCSR_MM (1U << 17) - -/* Exception definitions. */ -#define EXC_DE 0 -#define EXC_DB 1 -#define EXC_BP 3 -#define EXC_OF 4 -#define EXC_BR 5 -#define EXC_UD 6 -#define EXC_NM 7 -#define EXC_DF 8 -#define EXC_TS 10 -#define EXC_NP 11 -#define EXC_SS 12 -#define EXC_GP 13 -#define EXC_PF 14 -#define EXC_MF 16 -#define EXC_AC 17 -#define EXC_XM 19 - -#define EXC_HAS_EC \ - ((1u << EXC_DF) | (1u << EXC_TS) | (1u << EXC_NP) | \ - (1u << EXC_SS) | (1u << EXC_GP) | (1u << EXC_PF) | (1u << EXC_AC)) - -/* Segment selector error code bits. */ -#define ECODE_EXT (1 << 0) -#define ECODE_IDT (1 << 1) -#define ECODE_TI (1 << 2) - /* * Instruction emulation: * Most instructions are emulated directly via a fragment of inline assembly diff --git a/xen/arch/x86/x86_emulate/x86_emulate.h b/xen/arch/x86/x86_emulate/x86_emulate.h index 071668d8b1..df8d0e5ecc 100644 --- a/xen/arch/x86/x86_emulate/x86_emulate.h +++ b/xen/arch/x86/x86_emulate/x86_emulate.h @@ -23,6 +23,92 @@ #ifndef __X86_EMULATE_H__ #define __X86_EMULATE_H__ +/* MSRs. */ +#define MSR_TSC 0x00000010 +#define MSR_SYSENTER_CS 0x00000174 +#define MSR_SYSENTER_ESP 0x00000175 +#define MSR_SYSENTER_EIP 0x00000176 +#define MSR_DEBUGCTL 0x000001d9 +#define DEBUGCTL_BTF (1 << 1) +#define MSR_BNDCFGS 0x00000d90 +#define BNDCFG_ENABLE (1 << 0) +#define BNDCFG_PRESERVE (1 << 1) +#define MSR_EFER 0xc0000080 +#define MSR_STAR 0xc0000081 +#define MSR_LSTAR 0xc0000082 +#define MSR_CSTAR 0xc0000083 +#define MSR_FMASK 0xc0000084 +#define MSR_TSC_AUX 0xc0000103 + +/* Control register flags. */ +#define CR0_PE (1<<0) +#define CR0_MP (1<<1) +#define CR0_EM (1<<2) +#define CR0_TS (1<<3) + +#define CR4_VME (1<<0) +#define CR4_PVI (1<<1) +#define CR4_TSD (1<<2) +#define CR4_OSFXSR (1<<9) +#define CR4_OSXMMEXCPT (1<<10) +#define CR4_UMIP (1<<11) +#define CR4_FSGSBASE (1<<16) +#define CR4_OSXSAVE (1<<18) + + +/* EFLAGS bit definitions. */ +#define EFLG_ID (1<<21) +#define EFLG_VIP (1<<20) +#define EFLG_VIF (1<<19) +#define EFLG_AC (1<<18) +#define EFLG_VM (1<<17) +#define EFLG_RF (1<<16) +#define EFLG_NT (1<<14) +#define EFLG_IOPL (3<<12) +#define EFLG_OF (1<<11) +#define EFLG_DF (1<<10) +#define EFLG_IF (1<<9) +#define EFLG_TF (1<<8) +#define EFLG_SF (1<<7) +#define EFLG_ZF (1<<6) +#define EFLG_AF (1<<4) +#define EFLG_PF (1<<2) +#define EFLG_MBS (1<<1) +#define EFLG_CF (1<<0) + +/* Floating point status word definitions. */ +#define FSW_ES (1U << 7) + +/* MXCSR bit definitions. */ +#define MXCSR_MM (1U << 17) + +/* Exception definitions. */ +#define EXC_DE 0 +#define EXC_DB 1 +#define EXC_BP 3 +#define EXC_OF 4 +#define EXC_BR 5 +#define EXC_UD 6 +#define EXC_NM 7 +#define EXC_DF 8 +#define EXC_TS 10 +#define EXC_NP 11 +#define EXC_SS 12 +#define EXC_GP 13 +#define EXC_PF 14 +#define EXC_MF 16 +#define EXC_AC 17 +#define EXC_XM 19 + +#define EXC_HAS_EC \ + ((1u << EXC_DF) | (1u << EXC_TS) | (1u << EXC_NP) | \ + (1u << EXC_SS) | (1u << EXC_GP) | (1u << EXC_PF) | (1u << EXC_AC)) + +/* Segment selector error code bits. */ +#define ECODE_EXT (1 << 0) +#define ECODE_IDT (1 << 1) +#define ECODE_TI (1 << 2) + #define MAX_INST_LEN 15 struct x86_emulate_ctxt; -- 2.11.0 _______________________________________________ Xen-devel mailing list Xen-devel@xxxxxxxxxxxxx https://lists.xen.org/xen-devel

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