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[Xen-devel] [qemu-mainline baseline-only test] 68386: tolerable trouble: blocked/broken



This run is configured for baseline tests only.

flight 68386 qemu-mainline real [real]
http://osstest.xs.citrite.net/~osstest/testlogs/logs/68386/

Failures :-/ but no regressions.

Regressions which are regarded as allowable (not blocking):
 build-armhf-pvops             3 host-install(3)       broken baseline untested
 build-armhf-xsm               3 host-install(3)       broken baseline untested
 build-armhf                   3 host-install(3)       broken baseline untested
 build-i386                    3 host-install(3)       broken baseline untested
 build-i386-pvops              3 host-install(3)       broken baseline untested
 build-amd64-pvops             3 host-install(3)       broken baseline untested
 build-amd64                   3 host-install(3)       broken baseline untested
 build-i386-xsm                3 host-install(3)       broken baseline untested
 build-amd64-xsm               3 host-install(3)       broken baseline untested

Tests which did not succeed, but are not blocking:
 test-amd64-amd64-xl-qemuu-debianhvm-amd64  1 build-check(1)        blocked n/a
 test-amd64-i386-freebsd10-i386  1 build-check(1)               blocked  n/a
 test-amd64-amd64-qemuu-nested-intel  1 build-check(1)              blocked n/a
 test-amd64-i386-libvirt-qemuu-debianhvm-amd64-xsm 1 build-check(1) blocked n/a
 test-armhf-armhf-xl-midway    1 build-check(1)               blocked  n/a
 test-armhf-armhf-libvirt      1 build-check(1)               blocked  n/a
 test-amd64-i386-xl-qemuu-debianhvm-amd64-xsm  1 build-check(1)     blocked n/a
 test-amd64-i386-xl-qemuu-winxpsp3-vcpus1  1 build-check(1)         blocked n/a
 test-armhf-armhf-libvirt-raw  1 build-check(1)               blocked  n/a
 test-amd64-i386-libvirt-xsm   1 build-check(1)               blocked  n/a
 test-amd64-amd64-xl-multivcpu  1 build-check(1)               blocked  n/a
 test-amd64-i386-xl-qemuu-winxpsp3  1 build-check(1)               blocked  n/a
 test-amd64-amd64-libvirt      1 build-check(1)               blocked  n/a
 test-amd64-amd64-xl-pvh-amd   1 build-check(1)               blocked  n/a
 test-amd64-i386-freebsd10-amd64  1 build-check(1)               blocked  n/a
 test-amd64-amd64-pair         1 build-check(1)               blocked  n/a
 test-armhf-armhf-xl-credit2   1 build-check(1)               blocked  n/a
 test-amd64-amd64-xl-qemuu-win7-amd64  1 build-check(1)             blocked n/a
 test-amd64-amd64-libvirt-qemuu-debianhvm-amd64-xsm 1 build-check(1) blocked n/a
 test-amd64-amd64-pygrub       1 build-check(1)               blocked  n/a
 test-amd64-amd64-xl-qemuu-winxpsp3  1 build-check(1)               blocked n/a
 test-amd64-amd64-xl-qcow2     1 build-check(1)               blocked  n/a
 test-amd64-amd64-amd64-pvgrub  1 build-check(1)               blocked  n/a
 test-amd64-i386-xl-qemuu-debianhvm-amd64  1 build-check(1)         blocked n/a
 test-armhf-armhf-libvirt-xsm  1 build-check(1)               blocked  n/a
 test-amd64-i386-xl            1 build-check(1)               blocked  n/a
 build-i386-libvirt            1 build-check(1)               blocked  n/a
 test-amd64-i386-libvirt-pair  1 build-check(1)               blocked  n/a
 test-amd64-amd64-xl-qemuu-ovmf-amd64  1 build-check(1)             blocked n/a
 test-amd64-amd64-libvirt-vhd  1 build-check(1)               blocked  n/a
 test-amd64-amd64-xl-credit2   1 build-check(1)               blocked  n/a
 test-armhf-armhf-xl-multivcpu  1 build-check(1)               blocked  n/a
 test-amd64-i386-xl-xsm        1 build-check(1)               blocked  n/a
 build-amd64-libvirt           1 build-check(1)               blocked  n/a
 test-amd64-amd64-xl-qemuu-debianhvm-amd64-xsm  1 build-check(1)    blocked n/a
 test-amd64-i386-xl-qemuu-ovmf-amd64  1 build-check(1)              blocked n/a
 test-amd64-amd64-xl-pvh-intel  1 build-check(1)               blocked  n/a
 test-amd64-i386-xl-raw        1 build-check(1)               blocked  n/a
 test-amd64-i386-qemuu-rhel6hvm-amd  1 build-check(1)               blocked n/a
 test-amd64-amd64-i386-pvgrub  1 build-check(1)               blocked  n/a
 build-armhf-libvirt           1 build-check(1)               blocked  n/a
 test-amd64-i386-libvirt       1 build-check(1)               blocked  n/a
 test-amd64-amd64-libvirt-pair  1 build-check(1)               blocked  n/a
 test-armhf-armhf-libvirt-qcow2  1 build-check(1)               blocked  n/a
 test-armhf-armhf-xl           1 build-check(1)               blocked  n/a
 test-amd64-amd64-libvirt-xsm  1 build-check(1)               blocked  n/a
 test-amd64-amd64-xl-xsm       1 build-check(1)               blocked  n/a
 test-amd64-i386-qemuu-rhel6hvm-intel  1 build-check(1)             blocked n/a
 test-armhf-armhf-xl-vhd       1 build-check(1)               blocked  n/a
 test-amd64-i386-xl-qemuu-win7-amd64  1 build-check(1)              blocked n/a
 test-amd64-amd64-xl           1 build-check(1)               blocked  n/a
 test-amd64-i386-pair          1 build-check(1)               blocked  n/a
 test-amd64-amd64-qemuu-nested-amd  1 build-check(1)               blocked  n/a
 test-armhf-armhf-xl-rtds      1 build-check(1)               blocked  n/a
 test-armhf-armhf-xl-xsm       1 build-check(1)               blocked  n/a
 test-amd64-amd64-xl-rtds      1 build-check(1)               blocked  n/a

version targeted for testing:
 qemuu                a8c611e1133f97c979922f41103f79309339dc27
baseline version:
 qemuu                b6af8ea60282df514f87d32e36afd1c9aeee28c8

Last test of basis    68369  2017-01-14 16:46:20 Z    3 days
Testing same since    68386  2017-01-17 20:18:53 Z    0 days    1 attempts

------------------------------------------------------------
People who touched revisions under test:
  Alex Bennée <alex.bennee@xxxxxxxxxx>
  David Gibson <david@xxxxxxxxxxxxxxxxxxxxx>
  Laurent Vivier <laurent@xxxxxxxxx>
  Peter Maydell <peter.maydell@xxxxxxxxxx>
  Richard Henderson <rth@xxxxxxxxxxx>
  Thomas Huth <huth@xxxxxxxxxxxxx>

jobs:
 build-amd64-xsm                                              broken  
 build-armhf-xsm                                              broken  
 build-i386-xsm                                               broken  
 build-amd64                                                  broken  
 build-armhf                                                  broken  
 build-i386                                                   broken  
 build-amd64-libvirt                                          blocked 
 build-armhf-libvirt                                          blocked 
 build-i386-libvirt                                           blocked 
 build-amd64-pvops                                            broken  
 build-armhf-pvops                                            broken  
 build-i386-pvops                                             broken  
 test-amd64-amd64-xl                                          blocked 
 test-armhf-armhf-xl                                          blocked 
 test-amd64-i386-xl                                           blocked 
 test-amd64-amd64-libvirt-qemuu-debianhvm-amd64-xsm           blocked 
 test-amd64-i386-libvirt-qemuu-debianhvm-amd64-xsm            blocked 
 test-amd64-amd64-xl-qemuu-debianhvm-amd64-xsm                blocked 
 test-amd64-i386-xl-qemuu-debianhvm-amd64-xsm                 blocked 
 test-amd64-amd64-libvirt-xsm                                 blocked 
 test-armhf-armhf-libvirt-xsm                                 blocked 
 test-amd64-i386-libvirt-xsm                                  blocked 
 test-amd64-amd64-xl-xsm                                      blocked 
 test-armhf-armhf-xl-xsm                                      blocked 
 test-amd64-i386-xl-xsm                                       blocked 
 test-amd64-amd64-qemuu-nested-amd                            blocked 
 test-amd64-amd64-xl-pvh-amd                                  blocked 
 test-amd64-i386-qemuu-rhel6hvm-amd                           blocked 
 test-amd64-amd64-xl-qemuu-debianhvm-amd64                    blocked 
 test-amd64-i386-xl-qemuu-debianhvm-amd64                     blocked 
 test-amd64-i386-freebsd10-amd64                              blocked 
 test-amd64-amd64-xl-qemuu-ovmf-amd64                         blocked 
 test-amd64-i386-xl-qemuu-ovmf-amd64                          blocked 
 test-amd64-amd64-xl-qemuu-win7-amd64                         blocked 
 test-amd64-i386-xl-qemuu-win7-amd64                          blocked 
 test-amd64-amd64-xl-credit2                                  blocked 
 test-armhf-armhf-xl-credit2                                  blocked 
 test-amd64-i386-freebsd10-i386                               blocked 
 test-amd64-amd64-qemuu-nested-intel                          blocked 
 test-amd64-amd64-xl-pvh-intel                                blocked 
 test-amd64-i386-qemuu-rhel6hvm-intel                         blocked 
 test-amd64-amd64-libvirt                                     blocked 
 test-armhf-armhf-libvirt                                     blocked 
 test-amd64-i386-libvirt                                      blocked 
 test-armhf-armhf-xl-midway                                   blocked 
 test-amd64-amd64-xl-multivcpu                                blocked 
 test-armhf-armhf-xl-multivcpu                                blocked 
 test-amd64-amd64-pair                                        blocked 
 test-amd64-i386-pair                                         blocked 
 test-amd64-amd64-libvirt-pair                                blocked 
 test-amd64-i386-libvirt-pair                                 blocked 
 test-amd64-amd64-amd64-pvgrub                                blocked 
 test-amd64-amd64-i386-pvgrub                                 blocked 
 test-amd64-amd64-pygrub                                      blocked 
 test-armhf-armhf-libvirt-qcow2                               blocked 
 test-amd64-amd64-xl-qcow2                                    blocked 
 test-armhf-armhf-libvirt-raw                                 blocked 
 test-amd64-i386-xl-raw                                       blocked 
 test-amd64-amd64-xl-rtds                                     blocked 
 test-armhf-armhf-xl-rtds                                     blocked 
 test-amd64-i386-xl-qemuu-winxpsp3-vcpus1                     blocked 
 test-amd64-amd64-libvirt-vhd                                 blocked 
 test-armhf-armhf-xl-vhd                                      blocked 
 test-amd64-amd64-xl-qemuu-winxpsp3                           blocked 
 test-amd64-i386-xl-qemuu-winxpsp3                            blocked 


------------------------------------------------------------
sg-report-flight on osstest.xs.citrite.net
logs: /home/osstest/logs
images: /home/osstest/images

Logs, config files, etc. are available at
    http://osstest.xs.citrite.net/~osstest/testlogs/logs

Test harness code can be found at
    http://xenbits.xensource.com/gitweb?p=osstest.git;a=summary

broken-step build-armhf-pvops host-install(3)
broken-step build-armhf-xsm host-install(3)
broken-step build-armhf host-install(3)
broken-step build-i386 host-install(3)
broken-step build-i386-pvops host-install(3)
broken-step build-amd64-pvops host-install(3)
broken-step build-amd64 host-install(3)
broken-step build-i386-xsm host-install(3)
broken-step build-amd64-xsm host-install(3)

Push not applicable.

------------------------------------------------------------
commit a8c611e1133f97c979922f41103f79309339dc27
Merge: 2ccede1 d10eb08
Author: Peter Maydell <peter.maydell@xxxxxxxxxx>
Date:   Mon Jan 16 18:23:02 2017 +0000

    Merge remote-tracking branch 
'remotes/stsquad/tags/pull-tcg-common-tlb-reset-20170113-r1' into staging
    
    This is the same as the v3 posted except a re-base and a few extra signoffs
    
    # gpg: Signature made Fri 13 Jan 2017 14:26:46 GMT
    # gpg:                using RSA key 0xFBD0DB095A9E2A44
    # gpg: Good signature from "Alex Bennée (Master Work Key) 
<alex.bennee@xxxxxxxxxx>"
    # Primary key fingerprint: 6685 AE99 E751 67BC AFC8  DF35 FBD0 DB09 5A9E 
2A44
    
    * remotes/stsquad/tags/pull-tcg-common-tlb-reset-20170113-r1:
      cputlb: drop flush_global flag from tlb_flush
      cpu_common_reset: wrap TCG specific code in tcg_enabled()
      qom/cpu: move tlb_flush to cpu_common_reset
    
    Signed-off-by: Peter Maydell <peter.maydell@xxxxxxxxxx>

commit 2ccede18bd24fce5db83fef3674563a1f256717b
Merge: 02f50ca 727d937
Author: Peter Maydell <peter.maydell@xxxxxxxxxx>
Date:   Mon Jan 16 12:41:35 2017 +0000

    Merge remote-tracking branch 
'remotes/vivier/tags/m68k-for-2.9-pull-request' into staging
    
    # gpg: Signature made Sat 14 Jan 2017 09:06:31 GMT
    # gpg:                using RSA key 0xF30C38BD3F2FBE3C
    # gpg: Good signature from "Laurent Vivier <lvivier@xxxxxxxxxx>"
    # gpg:                 aka "Laurent Vivier <laurent@xxxxxxxxx>"
    # gpg:                 aka "Laurent Vivier (Red Hat) <lvivier@xxxxxxxxxx>"
    # Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F  5173 F30C 38BD 3F2F 
BE3C
    
    * remotes/vivier/tags/m68k-for-2.9-pull-request:
      target-m68k: increment/decrement with SP
      target-m68k: CAS doesn't need aligned access
      target-m68k: manage pre-dec et post-inc in CAS
      target-m68k: fix gen_flush_flags()
      target-m68k: fix bit operation with immediate value
      m68k: Remove PCI and USB from config file
      target-m68k: Implement bfffo
      target-m68k: Implement bitfield ops for memory
      target-m68k: Implement bitfield ops for registers
    
    Signed-off-by: Peter Maydell <peter.maydell@xxxxxxxxxx>

commit 02f50ca0ded973bfff69915ce5dad74a1308fdd2
Merge: b6af8ea 8cf9a3d
Author: Peter Maydell <peter.maydell@xxxxxxxxxx>
Date:   Mon Jan 16 11:17:38 2017 +0000

    Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20170113' into 
staging
    
    Fixes and more queued patches
    
    # gpg: Signature made Fri 13 Jan 2017 20:00:53 GMT
    # gpg:                using RSA key 0xAD1270CC4DD0279B
    # gpg: Good signature from "Richard Henderson <rth7680@xxxxxxxxx>"
    # gpg:                 aka "Richard Henderson <rth@xxxxxxxxxx>"
    # gpg:                 aka "Richard Henderson <rth@xxxxxxxxxxx>"
    # Primary key fingerprint: 9CB1 8DDA F8E8 49AD 2AFC  16A4 AD12 70CC 4DD0 
279B
    
    * remotes/rth/tags/pull-tcg-20170113:
      tcg/aarch64: Fix tcg_out_movi
      tcg/aarch64: Fix addsub2 for 0+C
      target/arm: Fix ubfx et al for aarch64
      tcg/s390: Fix merge error with facilities
    
    Signed-off-by: Peter Maydell <peter.maydell@xxxxxxxxxx>

commit 727d937b59f1f722f983e20f9cd23b0e7ef60165
Author: Laurent Vivier <laurent@xxxxxxxxx>
Date:   Fri Jan 13 19:36:33 2017 +0100

    target-m68k: increment/decrement with SP
    
    On 680x0 family only.
    
    Address Register indirect With postincrement:
    
    When using the stack pointer (A7) with byte size data, the register
    is incremented by two.
    
    Address Register indirect With predecrement:
    
    When using the stack pointer (A7) with byte size data, the register
    is decremented by two.
    
    Signed-off-by: Laurent Vivier <laurent@xxxxxxxxx>
    Reviewed-by: Thomas Huth <huth@xxxxxxxxxxxxx>
    Reviewed-by: Richard Henderson <rth@xxxxxxxxxxx>
    Message-Id: <1484332593-16782-6-git-send-email-laurent@xxxxxxxxx>

commit b19578f42872aefef891e5804359af8d935a5487
Author: Laurent Vivier <laurent@xxxxxxxxx>
Date:   Fri Jan 13 19:36:32 2017 +0100

    target-m68k: CAS doesn't need aligned access
    
    Signed-off-by: Laurent Vivier <laurent@xxxxxxxxx>
    Reviewed-by: Richard Henderson <rth@xxxxxxxxxxx>
    Message-Id: <1484332593-16782-5-git-send-email-laurent@xxxxxxxxx>

commit 308feb935249ad745ef763707e1db69bc10ba789
Author: Laurent Vivier <laurent@xxxxxxxxx>
Date:   Fri Jan 13 19:36:31 2017 +0100

    target-m68k: manage pre-dec et post-inc in CAS
    
    In these cases we must update the address register after
    the operation.
    
    Signed-off-by: Laurent Vivier <laurent@xxxxxxxxx>
    Reviewed-by: Richard Henderson <rth@xxxxxxxxxxx>
    Message-Id: <1484332593-16782-4-git-send-email-laurent@xxxxxxxxx>

commit 695576db2daaf2bdc63e7f6d36038b61caed622a
Author: Laurent Vivier <laurent@xxxxxxxxx>
Date:   Fri Jan 13 19:36:30 2017 +0100

    target-m68k: fix gen_flush_flags()
    
    gen_flush_flags() is setting unconditionally cc_op_synced to 1
    and s->cc_op to CC_OP_FLAGS, whereas env->cc_op can be set
    to something else by a previous tcg fragment.
    
    We fix that by not setting cc_op_synced to 1
    (except for gen_helper_flush_flags() that updates env->cc_op)
    
    FIX: https://github.com/vivier/qemu-m68k/issues/19
    
    Signed-off-by: Laurent Vivier <laurent@xxxxxxxxx>
    Reviewed-by: Richard Henderson <rth@xxxxxxxxxxx>
    Message-Id: <1484332593-16782-3-git-send-email-laurent@xxxxxxxxx>

commit fe53c2be8c12da345bd788b949e0b2360e4b3db3
Author: Laurent Vivier <laurent@xxxxxxxxx>
Date:   Fri Jan 13 19:36:29 2017 +0100

    target-m68k: fix bit operation with immediate value
    
    M680x0 bit operations with an immediate value use 9 bits of the 16bit
    value, while coldfire ones use only 8 bits.
    
    Signed-off-by: Laurent Vivier <laurent@xxxxxxxxx>
    Reviewed-by: Richard Henderson <rth@xxxxxxxxxxx>
    Message-Id: <1484332593-16782-2-git-send-email-laurent@xxxxxxxxx>

commit 7b6de33e3032f33a9097665adf336c5c3a9eaea7
Author: Thomas Huth <huth@xxxxxxxxxxxxx>
Date:   Fri Jan 6 08:39:56 2017 +0100

    m68k: Remove PCI and USB from config file
    
    None of the ColdFire boards that we currently support has a PCI or
    USB bus (and AFAIK the upcoming q800 machine does not support PCI
    and USB either), so we do not need these settings the config file.
    
    Signed-off-by: Thomas Huth <huth@xxxxxxxxxxxxx>
    Message-Id: <20170106083956.53d08923@thl530>
    Signed-off-by: Laurent Vivier <laurent@xxxxxxxxx>

commit a45f1763cc501861ea4f5eed06e6f58aa681a082
Author: Richard Henderson <rth@xxxxxxxxxxx>
Date:   Tue Nov 15 21:44:29 2016 +0100

    target-m68k: Implement bfffo
    
    Signed-off-by: Richard Henderson <rth@xxxxxxxxxxx>
    Message-Id: <1479242669-25852-1-git-send-email-rth@xxxxxxxxxxx>
    Signed-off-by: Laurent Vivier <laurent@xxxxxxxxx>

commit f2224f2c9a9ed63edaed77ae21ffb1e501d7f247
Author: Richard Henderson <rth@xxxxxxxxxxx>
Date:   Wed Nov 9 14:46:11 2016 +0100

    target-m68k: Implement bitfield ops for memory
    
    Signed-off-by: Richard Henderson <rth@xxxxxxxxxxx>
    Message-Id: <1478699171-10637-6-git-send-email-rth@xxxxxxxxxxx>
    Signed-off-by: Laurent Vivier <laurent@xxxxxxxxx>

commit ac815f46a325b5dabe2ebd6561e4244767c0a603
Author: Richard Henderson <rth@xxxxxxxxxxx>
Date:   Wed Nov 9 14:46:10 2016 +0100

    target-m68k: Implement bitfield ops for registers
    
    Signed-off-by: Richard Henderson <rth@xxxxxxxxxxx>
    Message-Id: <1478699171-10637-5-git-send-email-rth@xxxxxxxxxxx>
    Signed-off-by: Laurent Vivier <laurent@xxxxxxxxx>

commit 8cf9a3d3f7a4b95f33e0bda5416b9c93ec887dd3
Author: Richard Henderson <rth@xxxxxxxxxxx>
Date:   Wed Dec 7 10:07:27 2016 -0800

    tcg/aarch64: Fix tcg_out_movi
    
    There were some patterns, like 0x0000_ffff_ffff_00ff, for which we
    would select to begin a multi-insn sequence with MOVN, but would
    fail to set the 0x0000 lane back from 0xffff.
    
    Signed-off-by: Richard Henderson <rth@xxxxxxxxxxx>
    Message-Id: <20161207180727.6286-3-rth@xxxxxxxxxxx>

commit b1eb20da625897244e9621dabcf63d899deca54d
Author: Richard Henderson <rth@xxxxxxxxxxx>
Date:   Wed Dec 7 10:07:26 2016 -0800

    tcg/aarch64: Fix addsub2 for 0+C
    
    When al == xzr, we cannot use addi/subi because that encodes xsp.
    Force a zero into the temp register for that (rare) case.
    
    Signed-off-by: Richard Henderson <rth@xxxxxxxxxxx>
    Message-Id: <20161207180727.6286-2-rth@xxxxxxxxxxx>

commit 86c9ab277615af4e0389eb80a83073873ff96c86
Author: Richard Henderson <rth@xxxxxxxxxxx>
Date:   Fri Jan 13 09:48:20 2017 -0800

    target/arm: Fix ubfx et al for aarch64
    
    The patch in 59a71b4c5b4e suffered from a merge failure
    when compared to the original patch in
    
      http://lists.nongnu.org/archive/html/qemu-devel/2016-12/msg00137.html
    
    Signed-off-by: Richard Henderson <rth@xxxxxxxxxxx>

commit a32b6ae8976ca78483001e98cedea2329076055f
Author: Richard Henderson <rth@xxxxxxxxxxx>
Date:   Fri Jan 13 09:30:40 2017 -0800

    tcg/s390: Fix merge error with facilities
    
    The variable was renamed s390_facilities.
    
    Signed-off-by: Richard Henderson <rth@xxxxxxxxxxx>

commit d10eb08f5d8389c814b554d01aa2882ac58221bf
Author: Alex Bennée <alex.bennee@xxxxxxxxxx>
Date:   Mon Nov 14 14:17:28 2016 +0000

    cputlb: drop flush_global flag from tlb_flush
    
    We have never has the concept of global TLB entries which would avoid
    the flush so we never actually use this flag. Drop it and make clear
    that tlb_flush is the sledge-hammer it has always been.
    
    Signed-off-by: Alex Bennée <alex.bennee@xxxxxxxxxx>
    Reviewed-by: Richard Henderson <rth@xxxxxxxxxxx>
    [DG: ppc portions]
    Acked-by: David Gibson <david@xxxxxxxxxxxxxxxxxxxxx>

commit ba7d3d1858c257e39b47f7f12fa2016ffd960b11
Author: Alex Bennée <alex.bennee@xxxxxxxxxx>
Date:   Thu Jan 12 15:02:50 2017 +0000

    cpu_common_reset: wrap TCG specific code in tcg_enabled()
    
    Both the cpu->tb_jmp_cache and SoftMMU TLB structures are only used
    when running TCG code so we might as well skip them for anything else.
    
    Signed-off-by: Alex Bennée <alex.bennee@xxxxxxxxxx>
    Reviewed-by: Eduardo Habkost <ehabkost@xxxxxxxxxx>

commit 1f5c00cfdb8114c1e3a13426588ceb64f82c9ddb
Author: Alex Bennée <alex.bennee@xxxxxxxxxx>
Date:   Mon Nov 14 14:19:17 2016 +0000

    qom/cpu: move tlb_flush to cpu_common_reset
    
    It is a common thing amongst the various cpu reset functions want to
    flush the SoftMMU's TLB entries. This is done either by calling
    tlb_flush directly or by way of a general memset of the CPU
    structure (sometimes both).
    
    This moves the tlb_flush call to the common reset function and
    additionally ensures it is only done for the CONFIG_SOFTMMU case and
    when tcg is enabled.
    
    In some target cases we add an empty end_of_reset_fields structure to the
    target vCPU structure so have a clear end point for any memset which
    is resetting value in the structure before CPU_COMMON (where the TLB
    structures are).
    
    While this is a nice clean-up in general it is also a precursor for
    changes coming to cputlb for MTTCG where the clearing of entries
    can't be done arbitrarily across vCPUs. Currently the cpu_reset
    function is usually called from the context of another vCPU as the
    architectural power up sequence is run. By using the cputlb API
    functions we can ensure the right behaviour in the future.
    
    Signed-off-by: Alex Bennée <alex.bennee@xxxxxxxxxx>
    Reviewed-by: Richard Henderson <rth@xxxxxxxxxxx>
    Reviewed-by: David Gibson <david@xxxxxxxxxxxxxxxxxxxxx>

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