[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

[Xen-devel] [qemu-mainline test] 104200: regressions - FAIL



flight 104200 qemu-mainline real [real]
http://logs.test-lab.xenproject.org/osstest/logs/104200/

Regressions :-(

Tests which did not succeed and are blocking,
including tests which could not be run:
 test-amd64-i386-xl-qemuu-ovmf-amd64  5 xen-install       fail REGR. vs. 104178
 test-armhf-armhf-xl-credit2   6 xen-boot                 fail REGR. vs. 104178
 test-armhf-armhf-xl-multivcpu 16 guest-start.2           fail REGR. vs. 104178

Regressions which are regarded as allowable (not blocking):
 test-armhf-armhf-libvirt-xsm 13 saverestore-support-check    fail  like 104178
 test-armhf-armhf-libvirt     13 saverestore-support-check    fail  like 104178
 test-amd64-amd64-xl-qemuu-win7-amd64 16 guest-stop            fail like 104178
 test-amd64-i386-xl-qemuu-win7-amd64 16 guest-stop             fail like 104178
 test-armhf-armhf-libvirt-raw 12 saverestore-support-check    fail  like 104178
 test-armhf-armhf-libvirt-qcow2 12 saverestore-support-check   fail like 104178
 test-amd64-amd64-xl-rtds      9 debian-install               fail  like 104178

Tests which did not succeed, but are not blocking:
 test-amd64-amd64-xl-pvh-amd  11 guest-start                  fail   never pass
 test-amd64-amd64-xl-pvh-intel 11 guest-start                  fail  never pass
 test-amd64-i386-libvirt      12 migrate-support-check        fail   never pass
 test-amd64-i386-libvirt-xsm  12 migrate-support-check        fail   never pass
 test-amd64-amd64-libvirt-xsm 12 migrate-support-check        fail   never pass
 test-amd64-amd64-libvirt     12 migrate-support-check        fail   never pass
 test-amd64-i386-libvirt-qemuu-debianhvm-amd64-xsm 10 migrate-support-check 
fail never pass
 test-amd64-amd64-libvirt-qemuu-debianhvm-amd64-xsm 10 migrate-support-check 
fail never pass
 test-amd64-amd64-libvirt-vhd 11 migrate-support-check        fail   never pass
 test-amd64-amd64-qemuu-nested-amd 16 debian-hvm-install/l1/l2  fail never pass
 test-armhf-armhf-xl-xsm      12 migrate-support-check        fail   never pass
 test-armhf-armhf-xl-xsm      13 saverestore-support-check    fail   never pass
 test-armhf-armhf-xl          12 migrate-support-check        fail   never pass
 test-armhf-armhf-xl          13 saverestore-support-check    fail   never pass
 test-armhf-armhf-libvirt-xsm 12 migrate-support-check        fail   never pass
 test-armhf-armhf-libvirt     12 migrate-support-check        fail   never pass
 test-armhf-armhf-xl-cubietruck 12 migrate-support-check        fail never pass
 test-armhf-armhf-xl-cubietruck 13 saverestore-support-check    fail never pass
 test-armhf-armhf-xl-arndale  12 migrate-support-check        fail   never pass
 test-armhf-armhf-xl-arndale  13 saverestore-support-check    fail   never pass
 test-armhf-armhf-libvirt-raw 11 migrate-support-check        fail   never pass
 test-armhf-armhf-xl-rtds     12 migrate-support-check        fail   never pass
 test-armhf-armhf-xl-rtds     13 saverestore-support-check    fail   never pass
 test-armhf-armhf-xl-multivcpu 12 migrate-support-check        fail  never pass
 test-armhf-armhf-xl-multivcpu 13 saverestore-support-check    fail  never pass
 test-armhf-armhf-libvirt-qcow2 11 migrate-support-check        fail never pass
 test-armhf-armhf-xl-vhd      11 migrate-support-check        fail   never pass
 test-armhf-armhf-xl-vhd      12 saverestore-support-check    fail   never pass

version targeted for testing:
 qemuu                2ccede18bd24fce5db83fef3674563a1f256717b
baseline version:
 qemuu                b6af8ea60282df514f87d32e36afd1c9aeee28c8

Last test of basis   104178  2017-01-14 03:53:39 Z    3 days
Failing since        104191  2017-01-16 13:12:51 Z    0 days    2 attempts
Testing same since   104200  2017-01-17 05:00:22 Z    0 days    1 attempts

------------------------------------------------------------
People who touched revisions under test:
  Laurent Vivier <laurent@xxxxxxxxx>
  Peter Maydell <peter.maydell@xxxxxxxxxx>
  Richard Henderson <rth@xxxxxxxxxxx>
  Thomas Huth <huth@xxxxxxxxxxxxx>

jobs:
 build-amd64-xsm                                              pass    
 build-armhf-xsm                                              pass    
 build-i386-xsm                                               pass    
 build-amd64                                                  pass    
 build-armhf                                                  pass    
 build-i386                                                   pass    
 build-amd64-libvirt                                          pass    
 build-armhf-libvirt                                          pass    
 build-i386-libvirt                                           pass    
 build-amd64-pvops                                            pass    
 build-armhf-pvops                                            pass    
 build-i386-pvops                                             pass    
 test-amd64-amd64-xl                                          pass    
 test-armhf-armhf-xl                                          pass    
 test-amd64-i386-xl                                           pass    
 test-amd64-amd64-libvirt-qemuu-debianhvm-amd64-xsm           pass    
 test-amd64-i386-libvirt-qemuu-debianhvm-amd64-xsm            pass    
 test-amd64-amd64-xl-qemuu-debianhvm-amd64-xsm                pass    
 test-amd64-i386-xl-qemuu-debianhvm-amd64-xsm                 pass    
 test-amd64-amd64-libvirt-xsm                                 pass    
 test-armhf-armhf-libvirt-xsm                                 pass    
 test-amd64-i386-libvirt-xsm                                  pass    
 test-amd64-amd64-xl-xsm                                      pass    
 test-armhf-armhf-xl-xsm                                      pass    
 test-amd64-i386-xl-xsm                                       pass    
 test-amd64-amd64-qemuu-nested-amd                            fail    
 test-amd64-amd64-xl-pvh-amd                                  fail    
 test-amd64-i386-qemuu-rhel6hvm-amd                           pass    
 test-amd64-amd64-xl-qemuu-debianhvm-amd64                    pass    
 test-amd64-i386-xl-qemuu-debianhvm-amd64                     pass    
 test-amd64-i386-freebsd10-amd64                              pass    
 test-amd64-amd64-xl-qemuu-ovmf-amd64                         pass    
 test-amd64-i386-xl-qemuu-ovmf-amd64                          fail    
 test-amd64-amd64-xl-qemuu-win7-amd64                         fail    
 test-amd64-i386-xl-qemuu-win7-amd64                          fail    
 test-armhf-armhf-xl-arndale                                  pass    
 test-amd64-amd64-xl-credit2                                  pass    
 test-armhf-armhf-xl-credit2                                  fail    
 test-armhf-armhf-xl-cubietruck                               pass    
 test-amd64-i386-freebsd10-i386                               pass    
 test-amd64-amd64-qemuu-nested-intel                          pass    
 test-amd64-amd64-xl-pvh-intel                                fail    
 test-amd64-i386-qemuu-rhel6hvm-intel                         pass    
 test-amd64-amd64-libvirt                                     pass    
 test-armhf-armhf-libvirt                                     pass    
 test-amd64-i386-libvirt                                      pass    
 test-amd64-amd64-xl-multivcpu                                pass    
 test-armhf-armhf-xl-multivcpu                                fail    
 test-amd64-amd64-pair                                        pass    
 test-amd64-i386-pair                                         pass    
 test-amd64-amd64-libvirt-pair                                pass    
 test-amd64-i386-libvirt-pair                                 pass    
 test-amd64-amd64-amd64-pvgrub                                pass    
 test-amd64-amd64-i386-pvgrub                                 pass    
 test-amd64-amd64-pygrub                                      pass    
 test-armhf-armhf-libvirt-qcow2                               pass    
 test-amd64-amd64-xl-qcow2                                    pass    
 test-armhf-armhf-libvirt-raw                                 pass    
 test-amd64-i386-xl-raw                                       pass    
 test-amd64-amd64-xl-rtds                                     fail    
 test-armhf-armhf-xl-rtds                                     pass    
 test-amd64-i386-xl-qemuu-winxpsp3-vcpus1                     pass    
 test-amd64-amd64-libvirt-vhd                                 pass    
 test-armhf-armhf-xl-vhd                                      pass    
 test-amd64-amd64-xl-qemuu-winxpsp3                           pass    
 test-amd64-i386-xl-qemuu-winxpsp3                            pass    


------------------------------------------------------------
sg-report-flight on osstest.test-lab.xenproject.org
logs: /home/logs/logs
images: /home/logs/images

Logs, config files, etc. are available at
    http://logs.test-lab.xenproject.org/osstest/logs

Explanation of these reports, and of osstest in general, is at
    http://xenbits.xen.org/gitweb/?p=osstest.git;a=blob;f=README.email;hb=master
    http://xenbits.xen.org/gitweb/?p=osstest.git;a=blob;f=README;hb=master

Test harness code can be found at
    http://xenbits.xen.org/gitweb?p=osstest.git;a=summary


Not pushing.

------------------------------------------------------------
commit 2ccede18bd24fce5db83fef3674563a1f256717b
Merge: 02f50ca 727d937
Author: Peter Maydell <peter.maydell@xxxxxxxxxx>
Date:   Mon Jan 16 12:41:35 2017 +0000

    Merge remote-tracking branch 
'remotes/vivier/tags/m68k-for-2.9-pull-request' into staging
    
    # gpg: Signature made Sat 14 Jan 2017 09:06:31 GMT
    # gpg:                using RSA key 0xF30C38BD3F2FBE3C
    # gpg: Good signature from "Laurent Vivier <lvivier@xxxxxxxxxx>"
    # gpg:                 aka "Laurent Vivier <laurent@xxxxxxxxx>"
    # gpg:                 aka "Laurent Vivier (Red Hat) <lvivier@xxxxxxxxxx>"
    # Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F  5173 F30C 38BD 3F2F 
BE3C
    
    * remotes/vivier/tags/m68k-for-2.9-pull-request:
      target-m68k: increment/decrement with SP
      target-m68k: CAS doesn't need aligned access
      target-m68k: manage pre-dec et post-inc in CAS
      target-m68k: fix gen_flush_flags()
      target-m68k: fix bit operation with immediate value
      m68k: Remove PCI and USB from config file
      target-m68k: Implement bfffo
      target-m68k: Implement bitfield ops for memory
      target-m68k: Implement bitfield ops for registers
    
    Signed-off-by: Peter Maydell <peter.maydell@xxxxxxxxxx>

commit 02f50ca0ded973bfff69915ce5dad74a1308fdd2
Merge: b6af8ea 8cf9a3d
Author: Peter Maydell <peter.maydell@xxxxxxxxxx>
Date:   Mon Jan 16 11:17:38 2017 +0000

    Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20170113' into 
staging
    
    Fixes and more queued patches
    
    # gpg: Signature made Fri 13 Jan 2017 20:00:53 GMT
    # gpg:                using RSA key 0xAD1270CC4DD0279B
    # gpg: Good signature from "Richard Henderson <rth7680@xxxxxxxxx>"
    # gpg:                 aka "Richard Henderson <rth@xxxxxxxxxx>"
    # gpg:                 aka "Richard Henderson <rth@xxxxxxxxxxx>"
    # Primary key fingerprint: 9CB1 8DDA F8E8 49AD 2AFC  16A4 AD12 70CC 4DD0 
279B
    
    * remotes/rth/tags/pull-tcg-20170113:
      tcg/aarch64: Fix tcg_out_movi
      tcg/aarch64: Fix addsub2 for 0+C
      target/arm: Fix ubfx et al for aarch64
      tcg/s390: Fix merge error with facilities
    
    Signed-off-by: Peter Maydell <peter.maydell@xxxxxxxxxx>

commit 727d937b59f1f722f983e20f9cd23b0e7ef60165
Author: Laurent Vivier <laurent@xxxxxxxxx>
Date:   Fri Jan 13 19:36:33 2017 +0100

    target-m68k: increment/decrement with SP
    
    On 680x0 family only.
    
    Address Register indirect With postincrement:
    
    When using the stack pointer (A7) with byte size data, the register
    is incremented by two.
    
    Address Register indirect With predecrement:
    
    When using the stack pointer (A7) with byte size data, the register
    is decremented by two.
    
    Signed-off-by: Laurent Vivier <laurent@xxxxxxxxx>
    Reviewed-by: Thomas Huth <huth@xxxxxxxxxxxxx>
    Reviewed-by: Richard Henderson <rth@xxxxxxxxxxx>
    Message-Id: <1484332593-16782-6-git-send-email-laurent@xxxxxxxxx>

commit b19578f42872aefef891e5804359af8d935a5487
Author: Laurent Vivier <laurent@xxxxxxxxx>
Date:   Fri Jan 13 19:36:32 2017 +0100

    target-m68k: CAS doesn't need aligned access
    
    Signed-off-by: Laurent Vivier <laurent@xxxxxxxxx>
    Reviewed-by: Richard Henderson <rth@xxxxxxxxxxx>
    Message-Id: <1484332593-16782-5-git-send-email-laurent@xxxxxxxxx>

commit 308feb935249ad745ef763707e1db69bc10ba789
Author: Laurent Vivier <laurent@xxxxxxxxx>
Date:   Fri Jan 13 19:36:31 2017 +0100

    target-m68k: manage pre-dec et post-inc in CAS
    
    In these cases we must update the address register after
    the operation.
    
    Signed-off-by: Laurent Vivier <laurent@xxxxxxxxx>
    Reviewed-by: Richard Henderson <rth@xxxxxxxxxxx>
    Message-Id: <1484332593-16782-4-git-send-email-laurent@xxxxxxxxx>

commit 695576db2daaf2bdc63e7f6d36038b61caed622a
Author: Laurent Vivier <laurent@xxxxxxxxx>
Date:   Fri Jan 13 19:36:30 2017 +0100

    target-m68k: fix gen_flush_flags()
    
    gen_flush_flags() is setting unconditionally cc_op_synced to 1
    and s->cc_op to CC_OP_FLAGS, whereas env->cc_op can be set
    to something else by a previous tcg fragment.
    
    We fix that by not setting cc_op_synced to 1
    (except for gen_helper_flush_flags() that updates env->cc_op)
    
    FIX: https://github.com/vivier/qemu-m68k/issues/19
    
    Signed-off-by: Laurent Vivier <laurent@xxxxxxxxx>
    Reviewed-by: Richard Henderson <rth@xxxxxxxxxxx>
    Message-Id: <1484332593-16782-3-git-send-email-laurent@xxxxxxxxx>

commit fe53c2be8c12da345bd788b949e0b2360e4b3db3
Author: Laurent Vivier <laurent@xxxxxxxxx>
Date:   Fri Jan 13 19:36:29 2017 +0100

    target-m68k: fix bit operation with immediate value
    
    M680x0 bit operations with an immediate value use 9 bits of the 16bit
    value, while coldfire ones use only 8 bits.
    
    Signed-off-by: Laurent Vivier <laurent@xxxxxxxxx>
    Reviewed-by: Richard Henderson <rth@xxxxxxxxxxx>
    Message-Id: <1484332593-16782-2-git-send-email-laurent@xxxxxxxxx>

commit 7b6de33e3032f33a9097665adf336c5c3a9eaea7
Author: Thomas Huth <huth@xxxxxxxxxxxxx>
Date:   Fri Jan 6 08:39:56 2017 +0100

    m68k: Remove PCI and USB from config file
    
    None of the ColdFire boards that we currently support has a PCI or
    USB bus (and AFAIK the upcoming q800 machine does not support PCI
    and USB either), so we do not need these settings the config file.
    
    Signed-off-by: Thomas Huth <huth@xxxxxxxxxxxxx>
    Message-Id: <20170106083956.53d08923@thl530>
    Signed-off-by: Laurent Vivier <laurent@xxxxxxxxx>

commit a45f1763cc501861ea4f5eed06e6f58aa681a082
Author: Richard Henderson <rth@xxxxxxxxxxx>
Date:   Tue Nov 15 21:44:29 2016 +0100

    target-m68k: Implement bfffo
    
    Signed-off-by: Richard Henderson <rth@xxxxxxxxxxx>
    Message-Id: <1479242669-25852-1-git-send-email-rth@xxxxxxxxxxx>
    Signed-off-by: Laurent Vivier <laurent@xxxxxxxxx>

commit f2224f2c9a9ed63edaed77ae21ffb1e501d7f247
Author: Richard Henderson <rth@xxxxxxxxxxx>
Date:   Wed Nov 9 14:46:11 2016 +0100

    target-m68k: Implement bitfield ops for memory
    
    Signed-off-by: Richard Henderson <rth@xxxxxxxxxxx>
    Message-Id: <1478699171-10637-6-git-send-email-rth@xxxxxxxxxxx>
    Signed-off-by: Laurent Vivier <laurent@xxxxxxxxx>

commit ac815f46a325b5dabe2ebd6561e4244767c0a603
Author: Richard Henderson <rth@xxxxxxxxxxx>
Date:   Wed Nov 9 14:46:10 2016 +0100

    target-m68k: Implement bitfield ops for registers
    
    Signed-off-by: Richard Henderson <rth@xxxxxxxxxxx>
    Message-Id: <1478699171-10637-5-git-send-email-rth@xxxxxxxxxxx>
    Signed-off-by: Laurent Vivier <laurent@xxxxxxxxx>

commit 8cf9a3d3f7a4b95f33e0bda5416b9c93ec887dd3
Author: Richard Henderson <rth@xxxxxxxxxxx>
Date:   Wed Dec 7 10:07:27 2016 -0800

    tcg/aarch64: Fix tcg_out_movi
    
    There were some patterns, like 0x0000_ffff_ffff_00ff, for which we
    would select to begin a multi-insn sequence with MOVN, but would
    fail to set the 0x0000 lane back from 0xffff.
    
    Signed-off-by: Richard Henderson <rth@xxxxxxxxxxx>
    Message-Id: <20161207180727.6286-3-rth@xxxxxxxxxxx>

commit b1eb20da625897244e9621dabcf63d899deca54d
Author: Richard Henderson <rth@xxxxxxxxxxx>
Date:   Wed Dec 7 10:07:26 2016 -0800

    tcg/aarch64: Fix addsub2 for 0+C
    
    When al == xzr, we cannot use addi/subi because that encodes xsp.
    Force a zero into the temp register for that (rare) case.
    
    Signed-off-by: Richard Henderson <rth@xxxxxxxxxxx>
    Message-Id: <20161207180727.6286-2-rth@xxxxxxxxxxx>

commit 86c9ab277615af4e0389eb80a83073873ff96c86
Author: Richard Henderson <rth@xxxxxxxxxxx>
Date:   Fri Jan 13 09:48:20 2017 -0800

    target/arm: Fix ubfx et al for aarch64
    
    The patch in 59a71b4c5b4e suffered from a merge failure
    when compared to the original patch in
    
      http://lists.nongnu.org/archive/html/qemu-devel/2016-12/msg00137.html
    
    Signed-off-by: Richard Henderson <rth@xxxxxxxxxxx>

commit a32b6ae8976ca78483001e98cedea2329076055f
Author: Richard Henderson <rth@xxxxxxxxxxx>
Date:   Fri Jan 13 09:30:40 2017 -0800

    tcg/s390: Fix merge error with facilities
    
    The variable was renamed s390_facilities.
    
    Signed-off-by: Richard Henderson <rth@xxxxxxxxxxx>

_______________________________________________
Xen-devel mailing list
Xen-devel@xxxxxxxxxxxxx
https://lists.xen.org/xen-devel

 


Rackspace

Lists.xenproject.org is hosted with RackSpace, monitoring our
servers 24x7x365 and backed by RackSpace's Fanatical Support®.