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[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] Re: [Xen-devel] [RFC PATCH v2 04/26] ARM: GICv3 ITS: map ITS command buffer
On Thu, 22 Dec 2016, Andre Przywara wrote:
> Instead of directly manipulating the tables in memory, an ITS driver
> sends commands via a ring buffer to the ITS h/w to create or alter the
> LPI mappings.
> Allocate memory for that buffer and tell the ITS about it to be able
> to send ITS commands.
>
> Signed-off-by: Andre Przywara <andre.przywara@xxxxxxx>
Please address Julien's comments too, but this looks OK from my POV
> xen/arch/arm/gic-its.c | 27 +++++++++++++++++++++++++++
> xen/include/asm-arm/gic-its.h | 3 +++
> 2 files changed, 30 insertions(+)
>
> diff --git a/xen/arch/arm/gic-its.c b/xen/arch/arm/gic-its.c
> index f1540b2..2fb3bcb 100644
> --- a/xen/arch/arm/gic-its.c
> +++ b/xen/arch/arm/gic-its.c
> @@ -18,6 +18,7 @@
>
> #include <xen/config.h>
> #include <xen/lib.h>
> +#include <xen/err.h>
> #include <xen/device_tree.h>
> #include <xen/libfdt/libfdt.h>
> #include <xen/sizes.h>
> @@ -38,6 +39,8 @@ static DEFINE_PER_CPU(void *, pending_table);
>
> #define MAX_PHYS_LPIS (BIT_ULL(lpi_data.host_lpi_bits) - 8192)
>
> +#define ITS_CMD_QUEUE_SZ SZ_64K
> +
> #define BASER_ATTR_MASK \
> ((0x3UL << GITS_BASER_SHAREABILITY_SHIFT) | \
> (0x7UL << GITS_BASER_OUTER_CACHEABILITY_SHIFT) | \
> @@ -55,6 +58,26 @@ static uint64_t encode_phys_addr(paddr_t addr, int
> page_bits)
> return ret | (addr & GENMASK(51, 48)) >> (48 - 12);
> }
>
> +static void *its_map_cbaser(void __iomem *cbasereg)
> +{
> + uint64_t attr, reg;
> + void *buffer;
> +
> + attr = GIC_BASER_InnerShareable << GITS_BASER_SHAREABILITY_SHIFT;
> + attr |= GIC_BASER_CACHE_SameAsInner <<
> GITS_BASER_OUTER_CACHEABILITY_SHIFT;
> + attr |= GIC_BASER_CACHE_RaWaWb << GITS_BASER_INNER_CACHEABILITY_SHIFT;
> +
> + buffer = _xzalloc(ITS_CMD_QUEUE_SZ, PAGE_SIZE);
> + if ( !buffer )
> + return NULL;
> +
> + reg = attr | BIT_ULL(63) | (virt_to_maddr(buffer) & GENMASK(51, 12));
> + reg |= ((ITS_CMD_QUEUE_SZ / PAGE_SIZE) - 1) & GITS_CBASER_SIZE_MASK;
> + writeq_relaxed(reg, cbasereg);
> +
> + return buffer;
> +}
> +
> static int its_map_baser(void __iomem *basereg, uint64_t regc, int nr_items)
> {
> uint64_t attr;
> @@ -148,6 +171,10 @@ int gicv3_its_init(struct host_its *hw_its)
> }
> }
>
> + hw_its->cmd_buf = its_map_cbaser(hw_its->its_base + GITS_CBASER);
> + if ( !hw_its->cmd_buf )
> + return -ENOMEM;
> +
> return 0;
> }
>
> diff --git a/xen/include/asm-arm/gic-its.h b/xen/include/asm-arm/gic-its.h
> index 26b0584..e0fded8 100644
> --- a/xen/include/asm-arm/gic-its.h
> +++ b/xen/include/asm-arm/gic-its.h
> @@ -61,6 +61,8 @@
> (31UL <<
> GITS_BASER_ENTRY_SIZE_SHIFT) |\
> GITS_BASER_INDIRECT)
>
> +#define GITS_CBASER_SIZE_MASK 0xff
> +
> #ifndef __ASSEMBLY__
> #include <xen/device_tree.h>
>
> @@ -71,6 +73,7 @@ struct host_its {
> paddr_t addr;
> paddr_t size;
> void __iomem *its_base;
> + void *cmd_buf;
> };
>
> extern struct list_head host_its_list;
> --
> 2.9.0
>
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