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[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] Re: [Xen-devel] [PATCH 1/6] x86emul: extend / amend supported FPU opcodes
>>> On 07.12.16 at 15:35, <andrew.cooper3@xxxxxxxxxx> wrote:
> On 06/12/16 14:11, Jan Beulich wrote:
>> First of all there are a number of secondary encodings both Intel and
>> AMD support, but which aren't formally documented.
>
> Where did you get them from then?
>
> (I'm fine with introducing these if they exist, but it would be good to
> provide references if possible.)
From memory, plus re-validation of that memory. I have my own
disassembler library, where years ago I did put all of that in. I can't
tell what - if any - source I may have had back then, other than
having tried them all out on hardware.
>> @@ -3798,7 +3801,7 @@ x86_emulate(
>> emulate_fpu_insn_memdst("fnstcw", dst.val);
>> break;
>> default:
>> - goto cannot_emulate;
>> + generate_exception_if(true, EXC_UD);
>
> You can use generate_exception(EXC_UD); here, and several places below.
Oh, yes, I meant to check for those during re-base but then forgot
to do so here.
>> @@ -4090,13 +4100,19 @@ x86_emulate(
>> dst.reg = (unsigned long *)&_regs.eax;
>> emulate_fpu_insn_memdst("fnstsw", dst.val);
>> break;
>> + case 0xc0 ... 0xc7: /* ffreep %stN */
>
> This positioning looks wrong. ffreep doesn't appear to interact with
> FEATURE_CMOV, or eflags. Did you mean to have it part of the lower
> introduced block?
Yes indeed. Thanks for spotting.
Jan
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