[Xen-devel] [PATCH v2 00/16] x86: split insn emulator decode and execution

["Jan Beulich" <JBeulich@xxxxxxxx>]

..., complete the decoder, leverage decoding for SVM instruction
sizing and PV 32-bit call gate emulation, and use the emulator for
PV priv-op handling.

01: x86emul: split instruction decoding from execution
02: x86emul: fetch all insn bytes during the decode phase
03: x86emul: track only rIP in emulator state
04: x86emul: complete decoding of two-byte instructions
05: x86emul: add XOP decoding
06: x86emul: add EVEX decoding
07: x86emul: generate and make use of a canonical opcode representation
08: SVM: use generic instruction decoding
09: x86/32on64: use generic instruction decoding
10: x86/PV: split out dealing with CRn from privileged instruction handling
11: x86/PV: split out dealing with DRn from privileged instruction handling
12: x86/PV: split out dealing with MSRs from privileged instruction handling
13: x86emul: support XSETBV
14: x86emul: sort opcode 0f01 special case switch() statement
15: x86/PV: use generic emulator for privileged instruction handling
16: x86emul: don't assume a memory operand

Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx>
---
v2: Only minor adjustments; see individual patches for details.


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