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Re: [Xen-devel] PC8 Residency on Broadwell hardware



On 13/09/16 08:51, Jan Beulich wrote:
>>>> On 12.09.16 at 19:28, <jun.nakajima@xxxxxxxxx> wrote:
> Please try to get quoting right - your response was rather hard to
> follow.
>
>> On Sep 12, 2016, at 2:00 AM, Jan Beulich 
>> <JBeulich@xxxxxxxx<mailto:JBeulich@xxxxxxxx>> wrote:
>>
>> On 12.09.16 at 10:47, 
>> <andrew.cooper3@xxxxxxxxxx<mailto:andrew.cooper3@xxxxxxxxxx>> wrote:
>> c/s 350bc1a9d4 "x86: support newer Intel CPU models" changed the set of
>> MSRs read by Xeon Broadwell hardware (specifically, model 79 / 0x47).
> I think this was misleading: 79 == 0x4f. Andrew, can you confirm in
> your case please?

Very sorry for the confusion.  Yes, I was talking about model 0x4f.

>> Rereading the manual, it does indeed indicate that this MSR is available.
>>
>> However, experimentally it is not.  All Broadwell hardware XenServer has
>> (both SDPs and production systems) reliably take a #GP fault when trying
>> to read this MSR.  Haswell hardware appears fine (and indeed, was
>> reading that MSR before).
>>
>> Where did you find the info? I think you are talking about 
>> MSR_PKG_C8_RESIDENCY (630H).
> Yes.
>
>> The SDM says (35.13):
>>
>> "Processors with signatures 06_3DH and 06_47H support the MSR interfaces 
>> listed in Table 35-18, Table 35-19, Table 35-20, Table 35-23, Table 35-27, 
>> Table 35-28, Table 35-32, and Table 35-33.”
> Model 0x4f is what we're talking about, and table 35-36 has the information
> on MSR_PKG_C8_RESIDENCY (630H).

Correct.

~Andrew

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