mwait-idle: add Denverton Denverton is an Intel Atom based micro server which shares the same Goldmont architecture as Broxton. The available C-states on Denverton is a subset of Broxton with only C1, C1e, and C6. Signed-off-by: Jacob Pan Signed-off-by: Len Brown Signed-off-by: Rafael J. Wysocki [Linux commit: 0080d65b7719fc58e60b5595fc61acded330004f] Signed-off-by: Jan Beulich --- a/xen/arch/x86/cpu/mwait-idle.c +++ b/xen/arch/x86/cpu/mwait-idle.c @@ -658,6 +658,28 @@ static struct cpuidle_state bxt_cstates[ {} }; +static const struct cpuidle_state dnv_cstates[] = { + { + .name = "C1-DNV", + .flags = MWAIT2flg(0x00), + .exit_latency = 2, + .target_residency = 2, + }, + { + .name = "C1E-DNV", + .flags = MWAIT2flg(0x01), + .exit_latency = 10, + .target_residency = 20, + }, + { + .name = "C6-DNV", + .flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TLB_FLUSHED, + .exit_latency = 50, + .target_residency = 500, + }, + {} +}; + static void mwait_idle(void) { unsigned int cpu = smp_processor_id(); @@ -844,6 +866,11 @@ static const struct idle_cpu idle_cpu_bx .disable_promotion_to_c1e = 1, }; +static const struct idle_cpu idle_cpu_dnv = { + .state_table = dnv_cstates, + .disable_promotion_to_c1e = 1, +}; + #define ICPU(model, cpu) \ { X86_VENDOR_INTEL, 6, model, X86_FEATURE_MONITOR, \ &idle_cpu_##cpu} @@ -881,6 +908,7 @@ static const struct x86_cpu_id intel_idl ICPU(0x55, skx), ICPU(0x57, knl), ICPU(0x5c, bxt), + ICPU(0x5f, dnv), {} };