Re: [Xen-devel] [PATCH v2 19/20] livepatch/elf: Adjust section aligment to word

["Jan Beulich" <JBeulich@xxxxxxxx>]

>>> On 25.08.16 at 15:37, <konrad.wilk@xxxxxxxxxx> wrote:
> On most architectures it does not matter what the aligment is.
> 
> On ARM32 it is paramount that the aligment is word-size (4)
> otherwise we get a Data Abort when trying to perform ELF
> relocations. That is due to ARM 32 only being able to write to
> word-aligned addresses.

That's not exactly true, afaik: ARM can write to byte- and
half-word-aligned addresses, but only bytes/half-words.

> --- a/xen/common/livepatch_elf.c
> +++ b/xen/common/livepatch_elf.c
> @@ -71,7 +71,15 @@ static int elf_resolve_sections(struct livepatch_elf *elf, 
> const void *data)
>          delta = elf->hdr->e_shoff + i * elf->hdr->e_shentsize;
>  
>          sec[i].sec = data + delta;
> -
> +        /*
> +         * Some architectures REQUIRE section alignment to be word-size.
> +         */

This is a single line comment.

> +        if ( sec[i].sec->sh_addralign % sizeof(uint32_t) )

Hmm, word size for ARM64 and x86-64 ought to be 8 bytes. Also you
don't cover sec[i].sec->sh_addralign being zero (in fact any non-power-
of-2 value would seem bogus to me). And then - why does this need to
be done to all sections?

> +        {
> +            dprintk(XENLOG_DEBUG, LIVEPATCH "%s: Adjusting aligment for 
> section [%u]\n",
> +                    elf->name, i);
> +            ((Elf_Shdr *)sec[i].sec)->sh_addralign = 4;

And of course you know how I like such casting away of constness.

Jan


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