Re: [Xen-devel] [PATCH v1 6/9] livepatch: Initial ARM64 support.

[Julien Grall <julien.grall@xxxxxxx>]

Hi Konrad,

On 23/08/2016 22:14, Konrad Rzeszutek Wilk wrote:
> > > +    flush_xen_text_tlb_local();
> >
> > I am a bit confused. In your comment you mention the branch but flush the
> > TLBs. The two are not related.
> That code also flushes the I-cache (which sounds redundant with
> invalidate_icache).
> And it also does 'isb' ("Ensure synchronization with previous changes
> to text ") which
> invalidate_icache() does not.
>
> I am wondering if should just move 'isb' in invalidate_icache() and
> drop altogether the call to flush_xen_text_tlb_local()?
flush_xen_text_tlb_local will flush the TLB for the local processor, I 
am not sure why we would want to do that. It would be better to have a 
invalidate_icache helpers on ARM32.
> It works fine in simulator
>
> > However, I would prefer the branch predictor to be flushed directly in
> > invalidate_icache by calling BPIALLIS. This is because flushing the cache
> > means that you likely want to flush the branch predictor too.
> I had no trouble adding invalidate_icache to asm-arm/arm32/page.h and
> having it do :
>
>     asm volatile (
>         CMD_CP32(ICIALLUIS)     /* Flush I-cache. */
>         CMD_CP32(BPIALLIS)      /* Flush branch predictor. */
>         : : : "memory");
>
> But obviously that does not help ARM64.
>
> And that is is where I hit an snag. "bp iallis" instruction does not
> compile? (I also tried "bp iall", "bpiallis"). The error is:
>
> {standard input}: Assembler messages:
> {standard input}:454: Error: unknown mnemonic `bpiallis' -- `bpiallis'
The instruction bpiallis does not exist on ARM64 because the branch 
predictor does not require explicit flush.
Regards,

--
Julien Grall

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