Re: [Xen-devel] [PATCH v3 1/3] x86/emulate: add support for {, v}movq xmm, xmm/m64

["Jan Beulich" <JBeulich@xxxxxxxx>]

>>> On 01.08.16 at 04:52, <mdontu@xxxxxxxxxxxxxxx> wrote:
> @@ -4412,6 +4412,7 @@ x86_emulate(
>      case 0x7f: /* movq mm,mm/m64 */
>                 /* {,v}movdq{a,u} xmm,xmm/m128 */
>                 /* vmovdq{a,u} ymm,ymm/m256 */
> +    case 0xd6: /* {,v}movq xmm,xmm/m64 */
>      {
>          uint8_t *buf = get_stub(stub);
>          struct fpu_insn_ctxt fic = { .insn_bytes = 5 };
> @@ -4429,9 +4430,9 @@ x86_emulate(
>              case vex_66:
>              case vex_f3:
>                  host_and_vcpu_must_have(sse2);
> -                buf[0] = 0x66; /* movdqa */
> +                buf[0] = 0x66; /* SSE */

The comment change here indicates a problem: So far it was indicating
that despite the possible F3 prefix (movdqu) we encode a 66 one
(movdqa). Opcode D6 prefixed with F3, however, is movq2dq, which
you then either don't emulate correctly, or if it happens to be
emulated correctly you should include in the comment accompanying
the case label. And its AVX counterpart should then produce #UD.

Jan


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