Re: [Xen-devel] [PATCH v4 4/8] monitor: ARM SMC events

[Julien Grall <julien.grall@xxxxxxx>]

Hello Tamas,

On 04/07/16 22:05, Tamas K Lengyel wrote:
> On Mon, Jul 4, 2016 at 2:02 PM, Julien Grall <julien.grall@xxxxxxx> wrote:
> > On 04/07/2016 20:13, Tamas K Lengyel wrote:
> > > > On ARMv8, ESR_EL2.ISS has a different encoding depending on the state
> > > > (i.e
> > > > AArch64 or AArch32). See D7-1861 in ARM DDI 0487A.i. Furthermore, in
> > > > AArch32
> > > > state, the ARMv8 specs permits to trap conditional SMC instructions that
> > > > fail their condition check (see D7-1897 in ARM DDI 0406C.c).
[...]

> > > I'm unable to find the reference you mention about conditional SMCs
> > > generating Hyp traps even if they fail their condition checks on
> > > certain implementations. The only references I find in ARMv8 manual
> > > states explicitly that "The trap that HCR_EL2.TSC enables traps the
> > > attempted execution of a conditional SMC instruction only if the
> > > instruction passes its condition code check" (D1.15) and "The
> > > architecture requires that a Hyp trap on a conditional SMC instruction
> > > generates an exception only if the instruction passes its condition
> > > code check, see Trapping use of the SMC instruction on page G1-3510"
> > > (G1.16).
> >
> > If you look at description of HCR_EL2.TSC at D7-1973 in DDI 0487A.j;
> > "In AArch32 state, the ARMv8-A architecture permits, but does not require,
> > this trap to apply to conditional SMC instructions that fail their condition
> > code check, in the same way as with traps on
> > other conditional instructions."
> >
> > AFAICT the change was already present in the ARM ARM beginning of 2015. So I
> > suspect you are using an old version of the spec. In general, I would
> > recommend you to use the most recent spec for your development.
> >
> > For future question related to the spec, please mention the version of the
> > spec you quote. It makes easier to find out what is going on.
> Ah yes, indeed, I was looking at an older version. From the manual
> though it is not clear to me how we can differentiate SMCs that had
> their condition check fail from the others once its trapped to the
> VMM..
It would be very similar to how Xen is checking if a conditional 
instruction fails its condition check (see check_conditional_instr).
> Are you still planning to implement that filter?
It is in my todo list, however at the moment it towards the end. Feel 
free to send  patch yourself.
Regards,

--
Julien Grall

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