Re: [Xen-devel] [RFC 1/8] xen/arm: gic: Consolidate the IRQ affinity set in a single place

[Stefano Stabellini <sstabellini@xxxxxxxxxx>]

On Tue, 7 Jun 2016, Julien Grall wrote:
> The code to set the IRQ affinity is duplicated: once in
> gicv{2,3}_set_properties and the other is gicv{2,3}_irq_set_affinity.
> 
> Remove the code from gicv{2,3}_set_properties and call directly the
> affinity set helper from the common code.
> 
> Signed-off-by: Julien Grall <julien.grall@xxxxxxx>

Reviewed-by: Stefano Stabellini <sstabellini@xxxxxxxxxx>


>  xen/arch/arm/gic-v2.c     | 10 +---------
>  xen/arch/arm/gic-v3.c     | 10 ----------
>  xen/arch/arm/gic.c        |  3 ++-
>  xen/include/asm-arm/gic.h |  1 -
>  4 files changed, 3 insertions(+), 21 deletions(-)
> 
> diff --git a/xen/arch/arm/gic-v2.c b/xen/arch/arm/gic-v2.c
> index 450755f..90b07b3 100644
> --- a/xen/arch/arm/gic-v2.c
> +++ b/xen/arch/arm/gic-v2.c
> @@ -200,16 +200,10 @@ static unsigned int gicv2_read_irq(void)
>      return (readl_gicc(GICC_IAR) & GICC_IA_IRQ);
>  }
>  
> -/*
> - * needs to be called with a valid cpu_mask, ie each cpu in the mask has
> - * already called gic_cpu_init
> - */
>  static void gicv2_set_irq_properties(struct irq_desc *desc,
> -                                   const cpumask_t *cpu_mask,
> -                                   unsigned int priority)
> +                                     unsigned int priority)
>  {
>      uint32_t cfg, actual, edgebit;
> -    unsigned int mask = gicv2_cpu_mask(cpu_mask);
>      unsigned int irq = desc->irq;
>      unsigned int type = desc->arch.type;
>  
> @@ -240,8 +234,6 @@ static void gicv2_set_irq_properties(struct irq_desc 
> *desc,
>              IRQ_TYPE_LEVEL_HIGH;
>      }
>  
> -    /* Set target CPU mask (RAZ/WI on uniprocessor) */
> -    writeb_gicd(mask, GICD_ITARGETSR + irq);
>      /* Set priority */
>      writeb_gicd(priority, GICD_IPRIORITYR + irq);
>  
> diff --git a/xen/arch/arm/gic-v3.c b/xen/arch/arm/gic-v3.c
> index 9910877..c936c8a 100644
> --- a/xen/arch/arm/gic-v3.c
> +++ b/xen/arch/arm/gic-v3.c
> @@ -472,13 +472,10 @@ static inline uint64_t gicv3_mpidr_to_affinity(int cpu)
>  }
>  
>  static void gicv3_set_irq_properties(struct irq_desc *desc,
> -                                     const cpumask_t *cpu_mask,
>                                       unsigned int priority)
>  {
>      uint32_t cfg, actual, edgebit;
> -    uint64_t affinity;
>      void __iomem *base;
> -    unsigned int cpu = gicv3_get_cpu_from_mask(cpu_mask);
>      unsigned int irq = desc->irq;
>      unsigned int type = desc->arch.type;
>  
> @@ -516,13 +513,6 @@ static void gicv3_set_irq_properties(struct irq_desc 
> *desc,
>              IRQ_TYPE_LEVEL_HIGH;
>      }
>  
> -    affinity = gicv3_mpidr_to_affinity(cpu);
> -    /* Make sure we don't broadcast the interrupt */
> -    affinity &= ~GICD_IROUTER_SPI_MODE_ANY;
> -
> -    if ( irq >= NR_GIC_LOCAL_IRQS )
> -        writeq_relaxed(affinity, (GICD + GICD_IROUTER + irq * 8));
> -
>      /* Set priority */
>      if ( irq < NR_GIC_LOCAL_IRQS )
>          writeb_relaxed(priority, GICD_RDIST_SGI_BASE + GICR_IPRIORITYR0 + 
> irq);
> diff --git a/xen/arch/arm/gic.c b/xen/arch/arm/gic.c
> index 2bfe4de..8a1087b 100644
> --- a/xen/arch/arm/gic.c
> +++ b/xen/arch/arm/gic.c
> @@ -106,7 +106,8 @@ static void gic_set_irq_properties(struct irq_desc *desc,
>                                     const cpumask_t *cpu_mask,
>                                     unsigned int priority)
>  {
> -   gic_hw_ops->set_irq_properties(desc, cpu_mask, priority);
> +    gic_hw_ops->set_irq_properties(desc, priority);
> +    desc->handler->set_affinity(desc, cpu_mask);
>  }
>  
>  /* Program the GIC to route an interrupt to the host (i.e. Xen)
> diff --git a/xen/include/asm-arm/gic.h b/xen/include/asm-arm/gic.h
> index cd97bb2..b931f98 100644
> --- a/xen/include/asm-arm/gic.h
> +++ b/xen/include/asm-arm/gic.h
> @@ -331,7 +331,6 @@ struct gic_hw_operations {
>      unsigned int (*read_irq)(void);
>      /* Set IRQ property */
>      void (*set_irq_properties)(struct irq_desc *desc,
> -                               const cpumask_t *cpu_mask,
>                                 unsigned int priority);
>      /* Send SGI */
>      void (*send_SGI)(enum gic_sgi sgi, enum gic_sgi_mode irqmode,
> -- 
> 1.9.1
> 

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