[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: [Xen-devel] [PATCH V9 2/3] drivers/pl011: Use combination of UARTRIS and UARTMSC instead of UARTMIS





On 06/13/2016 05:30 AM, Stefano Stabellini wrote:
On Thu, 9 Jun 2016, Shanker Donthineni wrote:
The Masked interrupt status register (UARTMIS) is not described in ARM
SBSA 2.x document. Anding of two registers UARTMSC and UARTRIS values
gives the same information as register UARTMIS.

UARTRIS, UARTMSC and UARTMIS definitions are found in PrimeCell UART
PL011 (Revision: r1p4).
  - 3.3.10 Interrupt mask set/clear register, UARTIMSC
  - 3.3.11 Raw interrupt status register, UARTRIS
  - 3.3.12 Masked interrupt status register, UARTMIS

This change is necessary for driver to be SBSA compliant v2.x without
affecting the current driver functionality.

Signed-off-by: Shanker Donthineni <shankerd@xxxxxxxxxxxxxx>
Reviewed-by: Julien Grall <julien.grall@xxxxxxx>

Changes since v8:
  Fixed white spaces.

Changes since v7:
  Moved comment 'To compatible with SBSA v2.x document, all accesses
should be 32-bit' to #3
Changes since v1:
  Added a new function to return an interrupt status.

  xen/drivers/char/pl011.c | 10 ++++++++--
  1 file changed, 8 insertions(+), 2 deletions(-)

diff --git a/xen/drivers/char/pl011.c b/xen/drivers/char/pl011.c
index 6a3c21b..7e19c4a 100644
--- a/xen/drivers/char/pl011.c
+++ b/xen/drivers/char/pl011.c
@@ -53,11 +53,17 @@ static struct pl011 {
  #define pl011_read(uart, off)           readl((uart)->regs + (off))
  #define pl011_write(uart, off,val)      writel((val), (uart)->regs +
(off))
+static unsigned int pl011_intr_status(struct pl011 *uart)
Maybe this should be static inline?

In any case the series is good, I am happy to queue it up for 4.8.
Nice discussion on usage of keyword 'inline', https://www.kernel.org/doc/local/inline.html.

--
Shanker Donthineni
Qualcomm Technologies, Inc. on behalf of Qualcomm Innovation Center, Inc.
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux 
Foundation Collaborative Project


_______________________________________________
Xen-devel mailing list
Xen-devel@xxxxxxxxxxxxx
http://lists.xen.org/xen-devel

 


Rackspace

Lists.xenproject.org is hosted with RackSpace, monitoring our
servers 24x7x365 and backed by RackSpace's Fanatical Support®.