Re: [Xen-devel] [PATCH v2] arm/acpi: Add Server Base System Architecture UART support

[Shanker Donthineni <shankerd@xxxxxxxxxxxxxx>]

On 06/01/2016 11:18 AM, Julien Grall wrote:
> Hi Andre,
>
> On 01/06/16 16:56, Andre Przywara wrote:
>>>> I would like to support both the interfaces
>>>> (ACPI_DBG2_SBSA_32/ACPI_DBG2_SBSA) If you are okay.
>>>
>>> I am a bit puzzled, so your UART is only supporting 32-bit access (i.e
>>> no 16-bit and 8-bit access)?
>>
>> Just to clarify: the SBSA spec is not very clear in this respect, as it
>> only speaks of "a set of 32-bit registers". But this has been
>> interpreted as "supports 32-bit accesses". So there was a patch lately
>> in Linux to change all accesses to SBSA UARTs to 32-bit accessors
>> (writel/readl), because there is at least this one mentioned platform
>> that requires this, while all the other relevant platforms we could get
>> hold of can also cope with 32-bit accesses. This may not be true for all
>> legacy PL011 implementations out there, but for the SBSA subset this is
>> deemed a safe assumption.
>
> Thank you for the explanation.
>
>> So if possible we should switch to 32-bit accessors for the SBSA UART.
>
> The driver use 32-bit accessors exclusively.
>
>>
>>> If so your platform is based on SBSA v2.3, and therefore the PL011
>>> driver needs more modification to support properly your platform. For
>>> instance, the register UARTMIS is not present in v2.3 but used by the
>>> driver.
>>
>> I think this has been changed in the spec lately, it was present in
>> earlier revisions of the spec.
>
> If so, I would replace the read to UARTMIS by a combination UARTIMSC and 
> UARTRIS to avoid any issue with the UART based on SBSA v2.3.
>
I'll change the code to use registers UARTIMSC and UARTRIS instead of  UARTMIS.
> Cheers,
>

-- 
Shanker Donthineni
Qualcomm Technologies, Inc. on behalf of Qualcomm Innovation Center, Inc.
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux 
Foundation Collaborative Project


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