Re: [Xen-devel] [PATCH] iommu/quirk: disable shared EPT for Sandybridge and earlier processors.

["Jan Beulich" <JBeulich@xxxxxxxx>]

>>> On 25.11.15 at 11:28, <andrew.cooper3@xxxxxxxxxx> wrote:
> The problem is that SandyBridge IOMMUs advertise 2M support and do
> function with it, but cannot cache 2MB translations in the IOTLBs.
> 
> As a result, attempting to use 2M translations causes substantially
> worse performance than 4K translations.

Btw - how does this get explained? At a first glance, even if 2Mb
translations don't get entered into the TLB, it should still be one
less page table level to walk for the IOMMU, and should hence
nevertheless be a benefit. Yet you even say _substantially_
worse performance results.

Jan


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