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Re: [Xen-devel] [PATCH] x86: hide MWAITX from PV domains



On 13/10/15 13:25, Jan Beulich wrote:
> Since MWAIT is hidden too. (Linux starting with 4.3 is making use of
> that feature, and is checking for it without looking at the MWAIT one.)

This is surely a Linux bug which wants fixing as well?

>
> Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx>

Reviewed-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>

>
> --- a/xen/arch/x86/traps.c
> +++ b/xen/arch/x86/traps.c
> @@ -964,6 +964,7 @@ void pv_cpuid(struct cpu_user_regs *regs
>          __clear_bit(X86_FEATURE_LWP % 32, &c);
>          __clear_bit(X86_FEATURE_NODEID_MSR % 32, &c);
>          __clear_bit(X86_FEATURE_TOPOEXT % 32, &c);
> +        __clear_bit(X86_FEATURE_MWAITX % 32, &c);
>          break;
>  
>      case 0x0000000a: /* Architectural Performance Monitor Features (Intel) */
> --- a/xen/include/asm-x86/cpufeature.h
> +++ b/xen/include/asm-x86/cpufeature.h
> @@ -140,6 +140,7 @@
>  #define X86_FEATURE_TBM         (6*32+21) /* trailing bit manipulations */
>  #define X86_FEATURE_TOPOEXT     (6*32+22) /* topology extensions CPUID leafs 
> */
>  #define X86_FEATURE_DBEXT       (6*32+26) /* data breakpoint extension */
> +#define X86_FEATURE_MWAITX      (6*32+29) /* MWAIT extension 
> (MONITORX/MWAITX) */
>  
>  /* Intel-defined CPU features, CPUID level 0x00000007:0 (ebx), word 7 */
>  #define X86_FEATURE_FSGSBASE (7*32+ 0) /* {RD,WR}{FS,GS}BASE instructions */
>
>
>


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