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[Xen-devel] [PATCH 1/2] xen/arm: gic-v3: Clean-up the GIC*_PIDR2_* definitions



GICR_PIDR2 and GICD_PIDR2 use the same register layout. Rather than
define twice, one of which is an alias to the other, introduce GIC_PIDR2_*
defines.

Also:
    * Use the same prefix for the mask and the value
    * Integrate the shift in the value to avoid shifting in the code
    * Use GICv* to match the value name in the spec
    * Move them in a proper place

Signed-off-by: Julien Grall <julien.grall@xxxxxxxxxx>
---
 xen/arch/arm/gic-v3.c             |  8 ++++----
 xen/include/asm-arm/gic_v3_defs.h | 12 ++++--------
 2 files changed, 8 insertions(+), 12 deletions(-)

diff --git a/xen/arch/arm/gic-v3.c b/xen/arch/arm/gic-v3.c
index d1db1ce..4d623bf 100644
--- a/xen/arch/arm/gic-v3.c
+++ b/xen/arch/arm/gic-v3.c
@@ -639,8 +639,8 @@ static int __init gicv3_populate_rdist(void)
     {
         void __iomem *ptr = gicv3.rdist_regions[i].map_base;
 
-        reg = readl_relaxed(ptr + GICR_PIDR2) & GICR_PIDR2_ARCH_REV_MASK;
-        if ( (reg >> GICR_PIDR2_ARCH_REV_SHIFT) != GICR_PIDR2_ARCH_GICV3 )
+        reg = readl_relaxed(ptr + GICR_PIDR2) & GIC_PIDR2_ARCH_MASK;
+        if ( reg != GIC_PIDR2_ARCH_GICv3 )
         {
             dprintk(XENLOG_ERR,
                     "GICv3: No redistributor present @%"PRIpaddr"\n",
@@ -1193,8 +1193,8 @@ static int __init gicv3_init(void)
     if ( !gicv3.map_dbase )
         panic("GICv3: Failed to ioremap for GIC distributor\n");
 
-    reg = readl_relaxed(GICD + GICD_PIDR2) & GICD_PIDR2_ARCH_REV_MASK;
-    if ( ((reg >> GICD_PIDR2_ARCH_REV_SHIFT) != GICD_PIDR2_ARCH_GICV3) )
+    reg = readl_relaxed(GICD + GICD_PIDR2) & GIC_PIDR2_ARCH_MASK;
+    if ( reg != GIC_PIDR2_ARCH_GICv3 )
          panic("GICv3: no distributor detected\n");
 
     if ( !dt_property_read_u32(node, "#redistributor-regions",
diff --git a/xen/include/asm-arm/gic_v3_defs.h 
b/xen/include/asm-arm/gic_v3_defs.h
index bf7b239..b0ac6ff 100644
--- a/xen/include/asm-arm/gic_v3_defs.h
+++ b/xen/include/asm-arm/gic_v3_defs.h
@@ -40,6 +40,10 @@
 #define GICD_PIDR5                   (0xFFD4)
 #define GICD_PIDR7                   (0xFFDC)
 
+/* Common between GICD_PIDR2 and GICR_PIDR2 */
+#define GIC_PIDR2_ARCH_MASK         (0xf0)
+#define GIC_PIDR2_ARCH_GICv3        (0x30)
+
 #define GICC_SRE_EL2_SRE             (1UL << 0)
 #define GICC_SRE_EL2_DFB             (1UL << 1)
 #define GICC_SRE_EL2_DIB             (1UL << 2)
@@ -59,14 +63,6 @@
 #define GICR_WAKER_ProcessorSleep    (1U << 1)
 #define GICR_WAKER_ChildrenAsleep    (1U << 2)
 
-#define GICD_PIDR2_ARCH_REV_MASK     (0xf0)
-#define GICD_PIDR2_ARCH_REV_SHIFT    (0x4)
-#define GICD_PIDR2_ARCH_GICV3        (0x3)
-
-#define GICR_PIDR2_ARCH_REV_MASK     GICD_PIDR2_ARCH_REV_MASK
-#define GICR_PIDR2_ARCH_REV_SHIFT    GICD_PIDR2_ARCH_REV_SHIFT
-#define GICR_PIDR2_ARCH_GICV3        GICD_PIDR2_ARCH_GICV3
-
 #define GICR_SYNCR_NOT_BUSY          1
 /*
  * Implementation defined value JEP106?
-- 
2.1.4


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