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[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] Re: [Xen-devel] VT-d faults with Integrated Intel graphics on 4.6
On 26/08/15 18:15, Konrad Rzeszutek Wilk wrote: > On Wed, Aug 26, 2015 at 05:19:39PM +0100, Malcolm Crossley wrote: >> On 25/08/15 15:43, Konrad Rzeszutek Wilk wrote: >>> On Tue, Aug 25, 2015 at 02:55:31PM +0800, Chen, Tiejun wrote: >>>> On 8/25/2015 8:19 AM, Tamas K Lengyel wrote: >>>>> Hi everyone, >>>>> I saw some people passingly mention this on the list before but just in >>>>> case it has been missed, my serial is also being spammed with the >>>>> following >>>>> printouts with both Xen 4.6 RC1 and the latest staging build: >>>>> >>>>> ... >>>>> (XEN) [VT-D]DMAR:[DMA Read] Request device [0000:00:02.0] fault addr >>>>> 33487d7000, iommu reg = ffff82c000201000 >>>>> (XEN) [VT-D]DMAR: reason 06 - PTE Read access is not set >>>>> (XEN) [VT-D]DMAR:[DMA Read] Request device [0000:00:02.0] fault addr >>>>> 33487d7000, iommu reg = ffff82c000201000 >>>>> (XEN) [VT-D]DMAR: reason 06 - PTE Read access is not set >>>>> (XEN) [VT-D]DMAR:[DMA Read] Request device [0000:00:02.0] fault addr >>>>> 33487d7000, iommu reg = ffff82c000201000 >>>>> (XEN) [VT-D]DMAR: reason 06 - PTE Read access is not set >>>>> (XEN) [VT-D]DMAR:[DMA Read] Request device [0000:00:02.0] fault addr >>>>> 33487d7000, iommu reg = ffff82c000201000 >>>>> (XEN) [VT-D]DMAR: reason 06 - PTE Read access is not set >>>>> (XEN) [VT-D]DMAR:[DMA Read] Request device [0000:00:02.0] fault addr >>>>> 2610742000, iommu reg = ffff82c000201000 >>>>> (XEN) [VT-D]DMAR: reason 07 - Next page table ptr is invalid >>>>> ... >>>>> >> I think this problem is caused by missing IOMMU mappings for the RMRR regions >> if the domain does not have shared EPT enabled. This includes PV Dom 0. >> >> I have posted a patch to fix the issue: >> >> http://lists.xen.org/archives/html/xen-devel/2015-08/msg02090.html > No dice. Still seeing the same problem :-( Does your BIOS provide suitable extra RMRR regions when AMT is in use? IIRC, AMT uses the on-chip GPU as part of its VNC handling. ~Andrew _______________________________________________ Xen-devel mailing list Xen-devel@xxxxxxxxxxxxx http://lists.xen.org/xen-devel
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