[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] Re: [Xen-devel] [PATCH] x86: Allow PV guest set X86_CR4_PCE flag
On 08/10/2015 10:37 AM, Andrew Cooper wrote: On 10/08/15 15:27, Boris Ostrovsky wrote:With added PV support for VPMU, guests may legitimately decide to set CR4's PCE flag. We should allow this when VPMU is enabled. Signed-off-by: Boris Ostrovsky <boris.ostrovsky@xxxxxxxxxx>Why? Even a PV guest using VPMU should know that it doesn't actually control CR4.PCE All this (appears to) end up doing is putting PCE into the "allow but ignore" mask. Yes, that's what I wanted to do. How about this (not even compile tested) which is a rather shorter way of doing the same thing: We could do this too but I thought that if we have VPMU off there is no reason to allow this bit to be set (quietly). (There is no cpu_has_pce, we'd use cpu_has_arch_perfmon on Intel and do this unconditionally on AMD) -boris diff --git a/xen/arch/x86/domain.c b/xen/arch/x86/domain.c index 045f6ff..834ce0f 100644 --- a/xen/arch/x86/domain.c +++ b/xen/arch/x86/domain.c @@ -721,10 +721,12 @@ static int __init init_pv_cr4_masks(void) unsigned long common_mask = ~X86_CR4_TSD;/*- * All PV guests may attempt to modify TSD, DE and OSXSAVE. + * All PV guests may attempt to modify TSD, DE, PCE and OSXSAVE. */ if ( cpu_has_de ) common_mask &= ~X86_CR4_DE; + if ( cpu_has_pce ) + common_mask &= ~X86_CR4_PCE; if ( cpu_has_xsave ) common_mask &= ~X86_CR4_OSXSAVE;~Andrew _______________________________________________ Xen-devel mailing list Xen-devel@xxxxxxxxxxxxx http://lists.xen.org/xen-devel
|
Lists.xenproject.org is hosted with RackSpace, monitoring our |