Re: [Xen-devel] [PATCH 1/6] pvh: domu construct vmcb 64 bit mode start

[Boris Ostrovsky <boris.ostrovsky@xxxxxxxxxx>]

On 06/22/2015 12:37 PM, elena.ufimtseva@xxxxxxxxxx wrote:
> From: Elena Ufimtseva <elena.ufimtseva@xxxxxxxxxx>
>
> Signed-off-by: Mukesh Rathor <mukesh.rathor@xxxxxxxxxx>
> ---
All of these changes are common with Intel so we should be able to move 
them up to common layer. (For CS attributes the 32-bit patches that I 
posted earlier provide set_mode op).
-boris

>   xen/arch/x86/hvm/svm/vmcb.c | 16 +++++++++++++---
>   1 file changed, 13 insertions(+), 3 deletions(-)
>
> diff --git a/xen/arch/x86/hvm/svm/vmcb.c b/xen/arch/x86/hvm/svm/vmcb.c
> index 6339d2a..70a6588 100644
> --- a/xen/arch/x86/hvm/svm/vmcb.c
> +++ b/xen/arch/x86/hvm/svm/vmcb.c
> @@ -162,7 +162,12 @@ static int construct_vmcb(struct vcpu *v)
>       vmcb->ds.attr.bytes = 0xc93;
>       vmcb->fs.attr.bytes = 0xc93;
>       vmcb->gs.attr.bytes = 0xc93;
> -    vmcb->cs.attr.bytes = 0xc9b; /* exec/read, accessed */
> +
> +    if ( is_pvh_vcpu(v) )
> +        /* CS.L == 1, exec, read/write, accessed. PVH 32bitfixme. */
> +        vmcb->cs.attr.bytes = 0xa9b;
> +    else
> +        vmcb->cs.attr.bytes = 0xc9b; /* exec/read, accessed */
>   
>       /* Guest IDT. */
>       vmcb->idtr.base = 0;
> @@ -184,12 +189,17 @@ static int construct_vmcb(struct vcpu *v)
>       vmcb->tr.limit = 0xff;
>   
>       v->arch.hvm_vcpu.guest_cr[0] = X86_CR0_PE | X86_CR0_ET;
> +    /* PVH domains start in paging mode */
> +    if ( is_pvh_vcpu(v) )
> +        v->arch.hvm_vcpu.guest_cr[0] |= X86_CR0_PG;
>       hvm_update_guest_cr(v, 0);
>   
> -    v->arch.hvm_vcpu.guest_cr[4] = 0;
> +    v->arch.hvm_vcpu.guest_cr[4] = is_pvh_vcpu(v) ? X86_CR4_PAE : 0;
>       hvm_update_guest_cr(v, 4);
>   
> -    paging_update_paging_modes(v);
> +    /* For pvh, paging mode is updated by arch_set_info_guest(). */
> +    if ( is_hvm_vcpu(v) )
> +        paging_update_paging_modes(v);
>   
>       vmcb->_exception_intercepts =
>           HVM_TRAP_MASK

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