Re: [Xen-devel] [PATCH 04/19] xen: arm: provide and use a handle_raz_wi helper

[Ian Campbell <ian.campbell@xxxxxxxxxx>]

On Thu, 2015-04-02 at 17:01 +0100, Ian Campbell wrote:
> On Thu, 2015-04-02 at 16:50 +0100, Ian Campbell wrote:
> 
> > Writing to the bottom half (e.g. w0) of a register implicitly clears the
> > top half, IIRC, so I think a kernel is unlikely to want to do this, even
> > if it could (which I'm not quite convinced of).
> 
> That said, I'll see if I can make something work with the handle_*
> taking the reg number instead of a pointer and calling select_user_reg
> in each.

Actually don't even need that, I think the following does what is
needed. I'm not 100% convinced it is needed though, but it's simple
enough, and I can't find anything in the ARM ARM right now which rules
out what you are suggesting, even if it is unlikely.

Ian.

diff --git a/xen/arch/arm/traps.c b/xen/arch/arm/traps.c
index 71e349a..61a2106 100644
--- a/xen/arch/arm/traps.c
+++ b/xen/arch/arm/traps.c
@@ -1585,7 +1585,14 @@ static void handle_raz_wi(struct cpu_user_regs *regs,
         return inject_undef_exception(regs, hsr);
 
     if ( read )
-        *reg = 0;
+    {
+#ifdef CONFIG_ARM_64
+        if ( psr_mode_is_32bit(regs->cpsr) )
+            *reg &= ~0xffffffffUL;
+        else
+#endif
+            *reg = 0;
+    }
     /* else: write ignored */
 
     advance_pc(regs, hsr);
@@ -1622,7 +1629,12 @@ static void handle_ro_raz(struct cpu_user_regs *regs,
         return inject_undef_exception(regs, hsr);
     /* else: raz */
 
-    *reg = 0;
+#ifdef CONFIG_ARM_64
+    if ( psr_mode_is_32bit(regs->cpsr) )
+        *reg &= ~0xffffffffUL;
+    else
+#endif
+        *reg = 0;
 
     advance_pc(regs, hsr);
 }



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