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Re: [Xen-devel] [PATCH v2 1/3] hvmloader/tests: Improvements to shadow_gs_test()



>>> On 29.07.14 at 19:49, <andrew.cooper3@xxxxxxxxxx> wrote:
> @@ -158,7 +158,7 @@ static int shadow_gs_test(void)
>          "mov $0x20,%%ebx; "
>          "mov %%ebx,%%cr4; "
>          /* CR3 */
> -        "mov %%eax,%%cr3; "
> +        "mov %0,%%cr3; "
>          /* EFER.LME=1 */
>          "mov $0xc0000080,%%ecx; rdmsr; btsl $8,%%eax; wrmsr; "
>          /* CR0.PG=1 */
> @@ -170,12 +170,14 @@ static int shadow_gs_test(void)
>          /* Push LRETQ stack frame. */
>          "pushl $0; pushl $"STR(SEL_CODE32)"; pushl $0; pushl $2f; "
>          /* Jump to 64-bit mode. */
> -        "ljmp $"STR(SEL_CODE64)",$1f; 1: "
> +        "ljmp $"STR(SEL_CODE64)",$1f; "
> +        ".code64; 1: "
>          /* Swap GS_BASE and SHADOW_GS_BASE */
> -        ".byte 0x0f,0x01,0xf8; " /* SWAPGS */
> +        "swapgs; "
>          /* Jump to 32-bit mode. */
> -        ".byte 0x89, 0xe4; "     /* MOV ESP,ESP */
> -        ".byte 0x48, 0xcb; 2: "  /* LRETQ */
> +        "movl %%esp,%%esp; "
> +        "lretq; "
> +        ".code32; 2:"
>          /* Read SHADOW_GS_BASE: should now contain 2 */
>          "mov $0xc0000102,%%ecx; rdmsr; mov %%eax,%%ebx; "
>          /* CR0.PG=0 */
> @@ -185,7 +187,9 @@ static int shadow_gs_test(void)
>          "mov $0xc0000080,%%ecx; rdmsr; btcl $8,%%eax; wrmsr; "
>          /* CR4.PAE=0 */
>          "xor %%eax,%%eax; mov %%eax,%%cr4; "
> -        : "=b" (ebx) : "a" (PD_START) : "ecx", "edx", "memory" );
> +        : "=r" (dummy), "=&b" (ebx)
> +        : "0" (PD_START)
> +        : "eax", "ecx", "edx", "memory" );

This is all rather inconsistent now: The clobbered registers can't be
picked for operand 0 now. I think "=&a" (eax) would be better than
the dummy you use, even more so since the way you changed it
this register doesn't really get modified (i.e. you wouldn't need an
output). Or alternatively, when you relax the PD_START operand
you could also relax the one currently in %ebx - there's nothing
requiring it to be in that specific register afaict, and then specify its
initializer also in the asm() operands rather than its first instruction.
Same thing as for %eax would go for %ecx perhaps; only %edx is
truly just being clobbered.

Jan


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