Re: [Xen-devel] [PATCH v3 16/16] xen/arm: add SGI handling for GICv3

[Vijay Kilari <vijay.kilari@xxxxxxxxx>]

On Sat, Apr 19, 2014 at 1:50 AM, Julien Grall <julien.grall@xxxxxxxxxx> wrote:
> Hello Vijaya,
>
>
> On 15/04/14 12:17, vijay.kilari@xxxxxxxxx wrote:
>>
>> From: Vijaya Kumar K <Vijaya.Kumar@xxxxxxxxxxxxxxxxxx>
>>
>> In ARMv8, write to ICC_SGI1R_EL1 register raises trap to EL2.
>> Handle the trap and inject SGI to vcpu.
>>
>>   /* The base of the stack must always be double-word aligned, which means
>>    * that both the kernel half of struct cpu_user_regs (which is pushed in
>> @@ -1406,6 +1407,14 @@ static void do_sysreg(struct cpu_user_regs *regs,
>>               domain_crash_synchronous();
>>           }
>>           break;
>> +    case HSR_SYSREG_ICC_SGI1R_EL1:
>
>
> Any reason to not trap ICC_SGI0R_EL1 and ICC_ASGI1R_EL1?

Does Xen supports Secure guests?. In any case, I can make a check on GICR_NSACR
and reject if generating non-secure writes are permitted to generate
secure grp0 interrupts.
Similarly for ICC_ASG1R_EL1.
>
>
>> +        if ( !vgic_emulate(regs, hsr) )
>> +        {
>> +            dprintk(XENLOG_ERR,
>> +                    "failed emulation of 64-bit vgic sysreg access\n");
>> +            domain_crash_synchronous();
>
>
> So, you crash the domain if the SGI is not handled??? The GICv3 spec
> requests a specific behavior.

   Can you please point to GICv3 spec that request specific behavior
to handle this scenario?

-Vijay

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