Re: [Xen-devel] [PATCH V8] ns16550: Add support for UART present in Broadcom TruManage capable NetXtreme chips

[Aravind Gopalakrishnan <aravind.gopalakrishnan@xxxxxxx>]

On 12/6/2013 2:41 AM, Jan Beulich wrote:
> > > > On 05.12.13 at 23:38, Aravind Gopalakrishnan <Aravind.Gopalakrishnan@xxxxxxx> 
> > > > wrote:
> > Since it is an MMIO device, the code has been modified to accept MMIO based
> > devices as well. MMIO device settings are populated in the 'uart_config'
> > table.
> > It also advertises 64 bit BAR. Therefore, code is reworked to account for 64
> > bit BAR and 64 bit MMIO lengths.
> >
> > Some more quirks are - the need to shift the register offset by a specific
> > value and we also need to verify (UART_LSR_THRE && UART_LSR_TEMT) bits before
> > transmitting data.
> >
> > While testing, include com1=115200,8n1,pci,0 on the xen cmdline to observe
> > output on console using SoL.
> >
> > Changes from V7:
> >    - per Jan's comments:
> >      - Moving pci_ro_device to ns16550_init_postirq() so that either
> >        one of pci_hide_device or pci_ro_device is done at one place
> >      - remove leading '0' from printk as absent segment identifier
> >        implies zero anyway.
> >    - per Ian's comments:
> >      - fixed issues that casued his build to fail.
> >      - cross-compiled for arm32 and arm64 after applying patch and
> >        build was successful on local machine.
> >
> > Signed-off-by: Aravind Gopalakrishnan <Aravind.Gopalakrishnan@xxxxxxx>
> > Signed-off-by: Suravee Suthikulpanit <Suravee.Suthikulpanit@xxxxxxx>
> > Signed-off-by: Thomas Lendacky <Thomas.Lendacky@xxxxxxx>
> I'm fine with this now, but I take it that you're not intending this
> to go into 4.4, or else you'd have Cc-ed George explaining why
> a freeze exception is being requested.
Thanks Jan,

(Now cc-ing George..)
Please do consider this patch for 4.4 as it is a customer request for 
the AMD Open Compute project.
Thanks,
-Aravind.


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