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Re: [Xen-devel] [PATCH V4] ns16550: Add support for UART present in Broadcom TruManage capable NetXtreme chips
On 11/22/2013 6:29 AM, Jan Beulich wrote:
On 21.11.13 at 23:50, Aravind Gopalakrishnan <Aravind.Gopalakrishnan@xxxxxxx>
wrote:
@@ -432,9 +474,16 @@ static void __init ns16550_endboot(struct serial_port
*port)
{
#ifdef HAS_IOPORTS
struct ns16550 *uart = port->uart;
-
+ unsigned long sfn, efn;
+
Stray blanks.
Will fix this..
if ( uart->remapped_io_base )
+ {
+ sfn = paddr_to_pfn((unsigned long) uart->io_base + PAGE_SIZE);
+ efn = paddr_to_pfn((unsigned long) uart->io_base + uart->io_size - 1);
These casts aren't correct for 32-bit hosts (even if we don't have
any that define HAS_IOPORTS). And anyway, using PFN_UP()
and PFN_DOWN() here respectively would be much easier to read.
Okay, will correct them..
+ if ( iomem_deny_access(dom0, sfn, efn) != 0 )
You need to handle the case of sfn > efn, I think.
Will do..
+ /* Handle 64 bit BAR if found */
+ if ( bar & PCI_BASE_ADDRESS_MEM_TYPE_64 )
+ {
Do you really need that (and the respective changes elsewhere)?
I'd be fine with simply bailing in that case for the time being.
Yes, as the device has a 64 bit BAR.
+ }
+ else
+ {
+ len &= PCI_BASE_ADDRESS_MEM_MASK;
+ uart->io_size = len & ~(len - 1);
Once again: "len & -len" is the simpler alternative.
+ /* IO based */
+ else
+ {
+ pci_conf_write32(0, b, d, f,
+ PCI_BASE_ADDRESS_0 + bar_idx*4, ~0u);
+ len = pci_conf_read32(0, b, d, f, PCI_BASE_ADDRESS_0);
+ pci_conf_write32(0, b, d, f,
+ PCI_BASE_ADDRESS_0 + bar_idx*4, bar);
+ len &= PCI_BASE_ADDRESS_IO_MASK;
+ len &= ~(len - 1);
len &= -len (PCI_BASE_ADDRESS_IO_MASK being ~0x03UL I don't
see why this would be incorrect, as you indicated in a reply to v3).
Jan
Ah. I see it now.. (Originally I took it to mean just len = -(len)..
which worked for mmio case...)
Anyway, Will change it..
Thanks,
-Aravind.
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