Re: [Xen-devel] [PATCH RFC 2/8] xen/arm: implement read[bl] and write[bl]

[Ian Campbell <Ian.Campbell@xxxxxxxxxx>]

On Tue, 2013-09-10 at 16:12 +0100, Julien Grall wrote:
> On 09/10/2013 04:09 PM, Ian Campbell wrote:
> > On Tue, 2013-09-10 at 16:00 +0100, Julien Grall wrote:
> >> On 09/10/2013 03:18 PM, Ian Campbell wrote:
> >>> These are used in common driver code (specifically ns16550)
> >>
> >> Can you implement read[bl] and write[bl] also for arm64?
> > 
> > Uhm, yesm that's something of a prerequisite actually -- these functiosn
> > are in a common location so they need to be moved!
> 
> BTW, there is already an implementation for readl/writel but called
> ioreadl/iowritel.
> 
> You can either rename the functions or add some macros.

I'll double check them for equivalence and do that if possible.

> 
> > Well spotted.
> > 
> > I should also have mentioned the Linux heritage of these functions in
> > the commit message and/or in a code comment, which was remiss of me.
> > 
> >>
> >>> Signed-off-by: Ian Campbell <ian.campbell@xxxxxxxxxx>
> >>> ---
> >>>  xen/include/asm-arm/io.h |   48 
> >>> ++++++++++++++++++++++++++++++++++++++++++++++
> >>>  1 file changed, 48 insertions(+)
> >>>
> >>> diff --git a/xen/include/asm-arm/io.h b/xen/include/asm-arm/io.h
> >>> index aea5233..170263f 100644
> >>> --- a/xen/include/asm-arm/io.h
> >>> +++ b/xen/include/asm-arm/io.h
> >>> @@ -1,6 +1,54 @@
> >>>  #ifndef _ASM_IO_H
> >>>  #define _ASM_IO_H
> >>>  
> >>> +static inline void __raw_writeb(u8 val, volatile void __iomem *addr)
> >>> +{
> >>> +        asm volatile("strb %1, %0"
> >>> +                     : "+Qo" (*(volatile u8 __force *)addr)
> >>> +                     : "r" (val));
> >>> +}
> >>> +
> >>> +static inline void __raw_writel(u32 val, volatile void __iomem *addr)
> >>> +{
> >>> +        asm volatile("str %1, %0"
> >>> +                     : "+Qo" (*(volatile u32 __force *)addr)
> >>> +                     : "r" (val));
> >>> +}
> >>> +
> >>> +static inline u8 __raw_readb(const volatile void __iomem *addr)
> >>> +{
> >>> +        u8 val;
> >>> +        asm volatile("ldrb %1, %0"
> >>> +                     : "+Qo" (*(volatile u8 __force *)addr),
> >>> +                       "=r" (val));
> >>> +        return val;
> >>> +}
> >>> +
> >>> +static inline u32 __raw_readl(const volatile void __iomem *addr)
> >>> +{
> >>> +        u32 val;
> >>> +        asm volatile("ldr %1, %0"
> >>> +                     : "+Qo" (*(volatile u32 __force *)addr),
> >>> +                       "=r" (val));
> >>> +        return val;
> >>> +}
> >>> +
> >>> +#define __iormb()               rmb()
> >>> +#define __iowmb()               wmb()
> >>> +
> >>> +#define readb_relaxed(c) ({ u8  __r = __raw_readb(c); __r; })
> >>> +#define readl_relaxed(c) ({ u32 __r = le32_to_cpu((__force __le32) \
> >>> +                                        __raw_readl(c)); __r; })
> >>> +
> >>> +#define writeb_relaxed(v,c)     __raw_writeb(v,c)
> >>> +#define writel_relaxed(v,c)     __raw_writel((__force u32) 
> >>> cpu_to_le32(v),c)
> >>> +
> >>> +#define readb(c)                ({ u8  __v = readb_relaxed(c); 
> >>> __iormb(); __v; })
> >>> +#define readl(c)                ({ u32 __v = readl_relaxed(c); 
> >>> __iormb(); __v; })
> >>> +
> >>> +#define writeb(v,c)             ({ __iowmb(); writeb_relaxed(v,c); })
> >>> +#define writel(v,c)             ({ __iowmb(); writel_relaxed(v,c); })
> >>> +
> >>>  #endif
> >>>  /*
> >>>   * Local variables:
> >>>
> >>
> >>
> > 
> > 
> 
> 



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