Re: [Xen-devel] [PATCH v5 3/4] VMX: use proper instruction mnemonics if assembler supports them

[Tim Deegan <tim@xxxxxxx>]

At 13:45 +0100 on 29 Aug (1377783906), Jan Beulich wrote:
> >>> On 29.08.13 at 13:47, Tim Deegan <tim@xxxxxxx> wrote:
> > At 16:31 +0100 on 26 Aug (1377534696), Jan Beulich wrote:
> >> Additionally I was quite puzzled to find that all the asm()-s involved
> >> here have memory clobbers - what are they needed for? Or can they be
> >> dropped at least in some cases?
> > 
> > The vmread/write ones are, I think, red herrings.  We're not allowed to
> > make assumptions about the memory state of a loaded VMCS anyway.
> > 
> > invept I think does, to make sure all EPT changes have been written.
> > invvpid too, for similar reasons.
> 
> Considering that these instructions aren't documented to be
> ordered in any way with earlier ones (at least the instruction
> pages don't say anything to that effect), wouldn't we rather
> need an MFENCE to enforce this?

invept and invvpid are both serializing (in the list in vol 3A, 8-16). 

> > vmptrld/clear I'm not sure about: if we were to (say) copy a VMCS or
> > move it we'd need that barrier.  (AFAIK we don't do that but we might be
> > very surprised if we started).
> 
> Similarly here.

I think the x86 memory model is strong enough here: as long as the
compiler issues the instructions in the right order they'll be seen in
the right order by all CPUs.

Tim.

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