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[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [Xen-devel] Problems after enabling rcv/xmit interrupts of ns16550 on OMAP5
Hi Ian,
I was struggling with ns16550 UART driver post-irq initialization. It seems
that the system stop after enabling rcv/xmit interrupts of ns16550. And the
output I could read from console is like:
...
(XEN) Xen version 4.3-unstable (cbz@) (arm-linux-gnueabihf-gcc (crosstool-NG
linaro-1.13.3
(XEN) Latest ChangeSet: Wed Jul 3 11:37:02 2013 +0800 git:a4656de-dirty
(XEN) Console output is synchronous.
(XEN) Processor: "ARM Limited", variant: 0x2, part 0xc0f, rev 0x2
(XEN) 32-bit Execution:
(XEN) Processor Features: 00001131:00011011
(XEN) Instruction Sets: AArch32 Thumb Thumb-2 ThumbEE Jazelle
(XEN) Extensions: GenericTimer Security
(XEN) Debug Features: 02010555
(XEN) Auxiliary Features: 00000000
(XEN) Memory Model Features: 10201105 20000000 01240000 02102211
(XEN) ISA Features: 02101110 13112111 21232041 11112131 10011142 00000000
(XEN) Platform: TI OMAP5
(XEN) Generic Timer IRQ: phys=30 hyp=26 virt=27
(XEN) Using generic timer at 0 KHz
(XEN) GIC initialization:
(XEN) gic_dist_addr=0000000048211000
(XEN) gic_cpu_addr=0000000048212000
(XEN) gic_hyp_addr=0000000048214000
(XEN) gic_vcpu_addr=0000000048216000
(XEN) gic_maintenance_irq=25
(XEN) GIC: 192 lines, 2 cpus, secure (IID 0000043b).
(XEN) Waiting for 0 other CPUs to be ready
(XEN) Using scheduler: SMP Credit Scheduler (credit)
I pressed 'd' to dump the debug info. And here it is:
(XEN) 'd' pressed -> dumping registers
(XEN)
(XEN) *** Dumping CPU0 host state: ***
(XEN) ----[ Xen-4.3-unstable arm32 debug=y Tainted: C ]----
(XEN) CPU: 0
(XEN) PC: 0022ad48 set_timer+0x248/0x26c
(XEN) CPSR: 2000015a MODE:Hypervisor
(XEN) R0: 002d6380 R1: 00000000 R2: 00000000 R3: 00000000
(XEN) R4: 002a3440 R5: 00000000 R6: 002d6380 R7: 002d6380
(XEN) R8: 002d4000 R9: 002a3458 R10:2000015a R11:0028fe8c R12:00000000
(XEN) HYP: SP: 0028fe5c LR: 0022ad44
(XEN)
(XEN) HTTBR feed2000
(XEN) HDFAR 0
(XEN) HIFAR 0
(XEN) HPFAR 0
(XEN) HCR 00082835
(XEN) HSR 0
(XEN) VTTBR 0000000000
(XEN)
(XEN) DFSR 0 DFAR 0
(XEN) IFSR 0 IFAR 0
(XEN)
(XEN) Xen stack trace from sp=0028fe5c:
(XEN) 0022ad44 000f4240 00000000 0026075c 002a3408 0026075c 0026075c 00000002
(XEN) 0026075c 00040000 00000000 0028fe9c 002405e0 0025cf08 002a3408 0028feac
(XEN) 00267a68 0026075c 00000000 0028fecc 00268738 00000fff 00260d9c 0025e9b0
(XEN) fe000000 00000000 00000001 0028fee4 00267750 002d1fd8 00260d9c 0025e9b0
(XEN) fe000000 0028ff54 0026b02c 11112131 10011142 00000000 00000000 00000000
(XEN) 00000000 00000000 fdffa000 00004eb4 802d7700 80000000 00000001 80000000
(XEN) 00000000 ff000000 00000000 ff000000 00000000 00000000 00000018 00000000
(XEN) 00000000 00000000 802d7700 80200000 80000000 00400000 0020040c 00000000
(XEN) 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
(XEN) 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
(XEN) 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
(XEN) 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
(XEN) 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
(XEN) 00000000
(XEN) Xen call trace:
(XEN) [<0022ad48>] set_timer+0x248/0x26c (PC)
(XEN) [<0022ad44>] set_timer+0x244/0x26c (LR)
(XEN) [<002405e0>] ns16550_setup_postirq+0x58/0x5c
(XEN) [<00267a68>] ns16550_init_postirq+0xbc/0xc0
(XEN) [<00268738>] serial_init_postirq+0x48/0x70
(XEN) [<00267750>] console_init_postirq+0x18/0x1e8
(XEN) [<0026b02c>] start_xen+0x73c/0xae8
(XEN) [<0020040c>] paging+0xc/0x94
(XEN)
I disassembled xen-syms to see which instructions are around the top address
of call trace:
22ad14: 0a000002 beq 22ad24 <set_timer+0x224>
22ad18: e1d401b8 ldrh r0, [r4, #24]
22ad1c: e3a01000 mov r1, #0
22ad20: ebffeec8 bl 226848 <cpu_raise_softirq>
22ad24: e3060380 movw r0, #25472 ; 0x6380
22ad28: e340002d movt r0, #45 ; 0x2d
22ad2c: e3043000 movw r3, #16384 ; 0x4000
22ad30: e340302d movt r3, #45 ; 0x2d
22ad34: e1d421b8 ldrh r2, [r4, #24]
22ad38: e7933102 ldr r3, [r3, r2, lsl #2]
22ad3c: e0800003 add r0, r0, r3
22ad40: ebfff0ed bl 2270fc <_spin_unlock>
22ad44: e121f00a msr CPSR_c, sl
22ad48: e24bd020 sub sp, fp, #32
^^^^^^
22ad4c: e8bd8ff0 pop {r4, r5, r6, r7, r8, r9, sl, fp, pc}
22ad50: 002d6298 .word 0x002d6298
22ad54: 0025a3a8 .word 0x0025a3a8
22ad58: 00256b54 .word 0x00256b54
If I comment the "ns_write_reg(uart, IER, IER_ERDAI | IER_ETHREI);" line,
which is used to enable rcv/xmit interrupts in the ns16550_setup_postirq(),
then I could get a little more output such as:
(XEN) Allocated console ring of 16 KiB.
(XEN) Brought up 1 CPUs
(XEN) *** LOADING DOMAIN 0 ***
(XEN) Populate P2M 0x80000000->0x90000000
(XEN) Loading kernel from boot module 1
(XEN) Loading zImage from 00000000a0000000 to 0000000080008000-00000000803cccc8
(XEN) Std. Loglevel: All
(XEN) Guest Loglevel: All
(XEN) **********************************************
(XEN) ******* WARNING: CONSOLE OUTPUT IS SYNCHRONOUS
(XEN) ******* This option is intended to aid debugging of Xen by ensuring
(XEN) ******* that all output is synchronously delivered on the serial line.
(XEN) ******* However it can introduce SIGNIFICANT latencies and affect
(XEN) ******* timekeeping. It is NOT recommended for production use!
(XEN) **********************************************
(XEN) 3...
I've also sprinkled some early_printk around "ns_write_reg(uart, IER,
IER_ERDAI | IER_ETHREI);' to see what would be looked like. It is also
stuck. And the stuck point seems to be at 'early_uart_ready' which checks
Xmit holding register flag.
Any ideas?
Cheers,
Baozi
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