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On 23/05/13 15:26, George Dunlap wrote:
On 23/05/13 15:17, Fabio Fantoni
wrote:
Il 23/05/2013 12:54, George Dunlap
ha scritto:
On 23/05/13 11:39, Andrew Cooper wrote:
On 23/05/13 11:36, Fabio Fantoni
wrote:
Il 23/05/2013 09:39, Jan Beulich ha
scritto:
On 22.05.13 at 18:54, George
Dunlap <george.dunlap@xxxxxxxxxxxxx>
wrote:
On 22/05/13 17:30, Pasi KÃrkkÃinen wrote:
On Wed, May 22, 2013 at
04:05:27PM +0100, George Dunlap wrote:
Hmm, for testing, can we use cpuid to mask out SSE,
and then try qxl ?
That had occurred to me -- Andrew / Jan, do you know
which flag might
disable this particular instruction?
I guess we could try just disabling all the SSE
instructions.
movdqu is an SSE2 instruction, so disabling bit 26 of
CPUID EDX
output to EAX=1 input.
Can you explain better please?
Should I add this to test it?
cpuid="host,sse=0,sse2=0,ssse3=0,sse4_1=0,sse4_2=0,eax=1"
It will likely not work. SSE2 is an architectural
requirement for 64bit.
It means that 64bit code may assume the presence of SSE2.Â
Xen amongst
other software does make this assumption.
It might work if he's using 32-bit.
Fabio, as I said in my initial e-mail, you need to:
1. Run "cat /proc/cpuinfo" on your dom0
2. Look at the line that says "features:"
3. Find all the things that contain "sse" > 2 (sse2, ssse3,
&c)
4. Set them to 0 in the "cpuid" field like above.
Every processor will be a bit different -- you can't just copy
mine and expect it to work.
Don't include "eax=1" -- Jan is thinking of a different
interface.
Â-George
Tried with Raring (ubuntu 13.04) 32bit...
in cfg:
cpuid="host,sse=0,sse2=0,ssse3=0,sse4_1=0,sse4_2=0"
# xl create /etc/xen/RARING.cfg
Parsing config from /etc/xen/RARING.cfg
while parsing CPUID flag: "sse4_1=0":
 error #2: unknown CPUID flag name
while parsing CPUID flag: "sse4_2=0":
 error #2: unknown CPUID flag name
Right -- in that case this is a minor bug in libxl. (Actually I
got the same result, I just didn't notice the error messages --
sorry about that.)
Actually it's not a bug per se; libxl apparently just calls these
sse4.1 and sse4.2 respectively.
Â-George
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