[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] Re: [Xen-devel] [PATCH v4 18/22] xen/pci: Pay attention to PCI_MSIX_TABLE_OFFSET
On Fri, Apr 26, 2013 at 1:16 AM, Jan Beulich <JBeulich@xxxxxxxx> wrote: >>>> On 25.04.13 at 18:42, Bjorn Helgaas <bhelgaas@xxxxxxxxxx> wrote: >> On Thu, Apr 25, 2013 at 10:40:57AM +0100, Jan Beulich wrote: >>> Recent hypervisors will actually >>> only consume this to issue a warning if not matching what gets >>> read from the corresponding BAR. Earlier hypervisors used this >>> instead of reading the BAR. >> >> Note that pci_resource_start() gives you a CPU address, and what you >> read from the BAR is a PCI bus address. These are not in the same >> address space and can't be directly compared. I assume the >> hypervisors take that into account and do the appropriate >> conversions? > > I suppose Xen has never been run on a system where the two > would differ, and it's quite likely that it would break on such > systems. Question is - are there any x86-based systems where > this is the case? I haven't personally seen one, but it looks like they're coming, based on this patch we merged last year: commit b4873931cc8c934a9893d5962bde97aca23be983 Author: Mike Yoknis <mike.yoknis@xxxxxx> Date: Wed Nov 7 15:52:20 2012 -0700 x86/PCI: Allow x86 platforms to use translation offsets The memory range descriptors in the _CRS control method contain an address translation offset for host bridges. This value is used to translate addresses across the bridge. The support to use _TRA values is present for other architectures but not for X86 platforms. For existing X86 platforms the _TRA value is zero. Non-zero _TRA values are expected on future X86 platforms. This change will register that value with the resource. Signed-off-by: Mike Yoknis <mike.yoknis@xxxxxx> Signed-off-by: Bjorn Helgaas <bhelgaas@xxxxxxxxxx> _______________________________________________ Xen-devel mailing list Xen-devel@xxxxxxxxxxxxx http://lists.xen.org/xen-devel
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