[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [Xen-devel] [PATCH V2 1/4] xen: arm: rename xen_pgtable to boot_pgtable
The intention is that in a subsequent patch each PCPU will have its own pagetables and that xen_pgtable will become a per-cpu variable. The boot pagetables will become the boot cpu's pagetables. For now leave a #define in place for those places which semantically do mean xen_pgtable and not boot_pgtable. Signed-off-by: Ian Campbell <ian.campbell@xxxxxxxxxx> --- xen/arch/arm/arm32/head.S | 2 +- xen/arch/arm/arm64/head.S | 4 ++-- xen/arch/arm/mm.c | 18 +++++++++++------- 3 files changed, 14 insertions(+), 10 deletions(-) diff --git a/xen/arch/arm/arm32/head.S b/xen/arch/arm/arm32/head.S index f2f581d..0b4cfde 100644 --- a/xen/arch/arm/arm32/head.S +++ b/xen/arch/arm/arm32/head.S @@ -206,7 +206,7 @@ skip_bss: mcr CP32(r0, HSCTLR) /* Write Xen's PT's paddr into the HTTBR */ - ldr r4, =xen_pgtable + ldr r4, =boot_pgtable add r4, r4, r10 /* r4 := paddr (xen_pagetable) */ mov r5, #0 /* r4:r5 is paddr (xen_pagetable) */ mcrr CP64(r4, r5, HTTBR) diff --git a/xen/arch/arm/arm64/head.S b/xen/arch/arm/arm64/head.S index c18ef2b..f0d9066 100644 --- a/xen/arch/arm/arm64/head.S +++ b/xen/arch/arm/arm64/head.S @@ -190,14 +190,14 @@ skip_bss: msr SCTLR_EL2, x0 /* Write Xen's PT's paddr into the HTTBR */ - ldr x4, =xen_pgtable + ldr x4, =boot_pgtable add x4, x4, x20 /* x4 := paddr (xen_pagetable) */ msr TTBR0_EL2, x4 /* Non-boot CPUs don't need to rebuild the pagetable */ cbnz x22, pt_ready - ldr x1, =xen_first + ldr x1, =boot_first add x1, x1, x20 /* x1 := paddr (xen_first) */ mov x3, #PT_PT /* x2 := table map of xen_first */ orr x2, x1, x3 /* (+ rights for linear PT) */ diff --git a/xen/arch/arm/mm.c b/xen/arch/arm/mm.c index ba3140d..3cb852b 100644 --- a/xen/arch/arm/mm.c +++ b/xen/arch/arm/mm.c @@ -40,10 +40,10 @@ struct domain *dom_xen, *dom_io, *dom_cow; /* Static start-of-day pagetables that we use before the allocators are up */ -/* xen_pgtable == root of the trie (zeroeth level on 64-bit, first on 32-bit) */ -lpae_t xen_pgtable[LPAE_ENTRIES] __attribute__((__aligned__(4096))); +/* boot_pgtable == root of the trie (zeroeth level on 64-bit, first on 32-bit) */ +lpae_t boot_pgtable[LPAE_ENTRIES] __attribute__((__aligned__(4096))); #ifdef CONFIG_ARM_64 -lpae_t xen_first[LPAE_ENTRIES] __attribute__((__aligned__(4096))); +lpae_t boot_first[LPAE_ENTRIES] __attribute__((__aligned__(4096))); #endif /* N.B. The second-level table is 4 contiguous pages long, and covers * all addresses from 0 to 0xffffffff. Offsets into it are calculated @@ -52,6 +52,10 @@ lpae_t xen_second[LPAE_ENTRIES*4] __attribute__((__aligned__(4096*4))); lpae_t xen_fixmap[LPAE_ENTRIES] __attribute__((__aligned__(4096))); static lpae_t xen_xenmap[LPAE_ENTRIES] __attribute__((__aligned__(4096))); +/* boot_pgtable becomes the boot processors pagetable, eventually this will + * become a per-cpu variable */ +#define xen_pgtable boot_pgtable + /* Non-boot CPUs use this to find the correct pagetables. */ uint64_t boot_ttbr; @@ -284,11 +288,11 @@ void __init setup_pagetables(unsigned long boot_phys_offset, paddr_t xen_paddr) /* Beware! Any state we modify between now and the PT switch may be * discarded when we switch over to the copy. */ - /* Update the copy of xen_pgtable to use the new paddrs */ - p = (void *) xen_pgtable + dest_va - (unsigned long) _start; + /* Update the copy of boot_pgtable to use the new paddrs */ + p = (void *) boot_pgtable + dest_va - (unsigned long) _start; #ifdef CONFIG_ARM_64 p[0].pt.base += (phys_offset - boot_phys_offset) >> PAGE_SHIFT; - p = (void *) xen_first + dest_va - (unsigned long) _start; + p = (void *) boot_first + dest_va - (unsigned long) _start; #endif for ( i = 0; i < 4; i++) p[i].pt.base += (phys_offset - boot_phys_offset) >> PAGE_SHIFT; @@ -305,7 +309,7 @@ void __init setup_pagetables(unsigned long boot_phys_offset, paddr_t xen_paddr) p[i].pt.base += (phys_offset - boot_phys_offset) >> PAGE_SHIFT; /* Change pagetables to the copy in the relocated Xen */ - boot_ttbr = (uintptr_t) xen_pgtable + phys_offset; + boot_ttbr = (uintptr_t) boot_pgtable + phys_offset; flush_xen_dcache(boot_ttbr); flush_xen_dcache_va_range((void*)dest_va, _end - _start); flush_xen_text_tlb(); -- 1.7.2.5 _______________________________________________ Xen-devel mailing list Xen-devel@xxxxxxxxxxxxx http://lists.xen.org/xen-devel
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