[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] Re: [Xen-devel] [PATCH 0/6] x86/IOMMU: multi-vector MSI
>>> On 19.04.13 at 12:50, "Jan Beulich" <JBeulich@xxxxxxxx> wrote: > 1: AMD IOMMU: allocate IRTE entries instead of using a static mapping > 2: AMD IOMMU: untie remap and vector maps > 3: VT-d: enable for multi-vector MSI > 4: AMD IOMMU: enable for multi-vector MSI > 5: x86: enable multi-vector MSI > 6: pciif: add multi-vector-MSI command For reference I'm also sending our kernel side code, as just discussed on irc. I'm also including the fragment that I created for pv-ops, which I stopped when seeing that I'd need to play with xen_bind_pirq_msi_to_irq() in any case. And please recall - the hypervisor side works only on VT-d so far. Jan Attachment:
xen3-patch-3.9-rc5-multi-vector-MSI-pt.pvops Attachment:
xen3-patch-3.9-rc5-multi-vector-MSI Attachment:
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