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[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] Re: [Xen-devel] [PATCH 02/10] nested vmx: expose bit 55 of IA32_VMX_BASIC_MSR to guest VMM
>>> On 04.12.12 at 06:53, Dongxiao Xu <dongxiao.xu@xxxxxxxxx> wrote:
I'm sorry, but exposing something that doesn't even have a name
sound very awkward to me. Please adjust existing code using the
literal number in a prerequisite patch, and then use the added
constant here too.
Jan
> Signed-off-by: Dongxiao Xu <dongxiao.xu@xxxxxxxxx>
> ---
> xen/arch/x86/hvm/vmx/vvmx.c | 37 +++++++++++++++++++++++++------------
> 1 files changed, 25 insertions(+), 12 deletions(-)
>
> diff --git a/xen/arch/x86/hvm/vmx/vvmx.c b/xen/arch/x86/hvm/vmx/vvmx.c
> index 719bfce..cf91c7c 100644
> --- a/xen/arch/x86/hvm/vmx/vvmx.c
> +++ b/xen/arch/x86/hvm/vmx/vvmx.c
> @@ -1299,7 +1299,7 @@ int nvmx_handle_vmwrite(struct cpu_user_regs *regs)
> */
> int nvmx_msr_read_intercept(unsigned int msr, u64 *msr_content)
> {
> - u64 data = 0, tmp;
> + u64 data = 0, tmp = 0;
> int r = 1;
>
> if ( !nestedhvm_enabled(current->domain) )
> @@ -1311,18 +1311,20 @@ int nvmx_msr_read_intercept(unsigned int msr, u64
> *msr_content)
> switch (msr) {
> case MSR_IA32_VMX_BASIC:
> data = VVMCS_REVISION | ((u64)PAGE_SIZE) << 32 |
> - ((u64)MTRR_TYPE_WRBACK) << 50;
> + ((u64)MTRR_TYPE_WRBACK) << 50 | (1ULL << 55);
> break;
> case MSR_IA32_VMX_PINBASED_CTLS:
> + case MSR_IA32_VMX_TRUE_PINBASED_CTLS:
> /* 1-seetings */
> data = PIN_BASED_EXT_INTR_MASK |
> PIN_BASED_NMI_EXITING |
> PIN_BASED_PREEMPT_TIMER;
> - data <<= 32;
> - /* 0-settings */
> - data |= 0;
> + /* Consult SDM for default1 setting */
> + tmp = ( (1<<1) | (1<<2) | (1<<4) );
> + data = ((data | tmp) << 32) | (tmp);
> break;
> case MSR_IA32_VMX_PROCBASED_CTLS:
> + case MSR_IA32_VMX_TRUE_PROCBASED_CTLS:
> /* 1-seetings */
> data = CPU_BASED_HLT_EXITING |
> CPU_BASED_VIRTUAL_INTR_PENDING |
> @@ -1342,10 +1344,14 @@ int nvmx_msr_read_intercept(unsigned int msr, u64
> *msr_content)
> CPU_BASED_VIRTUAL_NMI_PENDING |
> CPU_BASED_ACTIVATE_MSR_BITMAP |
> CPU_BASED_ACTIVATE_SECONDARY_CONTROLS;
> - /* bit 1, 4-6,8,13-16,26 must be 1 (refer G4 of SDM) */
> - tmp = ( (1<<26) | (0xf << 13) | 0x100 | (0x7 << 4) | 0x2);
> + /* Consult SDM for default1 setting */
> + if ( msr == MSR_IA32_VMX_PROCBASED_CTLS )
> + tmp = 0x401e172;
> + else if ( msr == MSR_IA32_VMX_TRUE_PROCBASED_CTLS )
> + tmp = 0x4006172;
> /* 0-settings */
> data = ((data | tmp) << 32) | (tmp);
> +
> break;
> case MSR_IA32_VMX_PROCBASED_CTLS2:
> /* 1-seetings */
> @@ -1355,9 +1361,12 @@ int nvmx_msr_read_intercept(unsigned int msr, u64
> *msr_content)
> data = (data << 32) | tmp;
> break;
> case MSR_IA32_VMX_EXIT_CTLS:
> - /* 1-seetings */
> - /* bit 0-8, 10,11,13,14,16,17 must be 1 (refer G4 of SDM) */
> - tmp = 0x36dff;
> + case MSR_IA32_VMX_TRUE_EXIT_CTLS:
> + /* Consult SDM for default1 setting */
> + if ( msr == MSR_IA32_VMX_EXIT_CTLS )
> + tmp = 0x36dff;
> + else if ( msr == MSR_IA32_VMX_TRUE_EXIT_CTLS )
> + tmp = 0x36dfb;
> data = VM_EXIT_ACK_INTR_ON_EXIT |
> VM_EXIT_IA32E_MODE |
> VM_EXIT_SAVE_PREEMPT_TIMER |
> @@ -1370,8 +1379,12 @@ int nvmx_msr_read_intercept(unsigned int msr, u64
> *msr_content)
> data = ((data | tmp) << 32) | tmp;
> break;
> case MSR_IA32_VMX_ENTRY_CTLS:
> - /* bit 0-8, and 12 must be 1 (refer G5 of SDM) */
> - tmp = 0x11ff;
> + case MSR_IA32_VMX_TRUE_ENTRY_CTLS:
> + /* Consult SDM for default1 setting */
> + if ( msr == MSR_IA32_VMX_ENTRY_CTLS )
> + tmp = 0x11ff;
> + else if ( msr == MSR_IA32_VMX_TRUE_ENTRY_CTLS )
> + tmp = 0x11fb;
> data = VM_ENTRY_LOAD_GUEST_PAT |
> VM_ENTRY_LOAD_GUEST_EFER |
> VM_ENTRY_LOAD_PERF_GLOBAL_CTRL;
> --
> 1.7.1
>
>
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> http://lists.xen.org/xen-devel
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