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[Xen-devel] [PATCH 4 of 6] x86: fix logical ANDs used to mask bitfields


  • To: xen-devel@xxxxxxxxxxxxx
  • From: Tim Deegan <tim@xxxxxxx>
  • Date: Thu, 5 Apr 2012 13:07:17 +0100
  • Delivery-date: Thu, 05 Apr 2012 12:11:14 +0000
  • List-id: Xen developer discussion <xen-devel.lists.xen.org>

# HG changeset patch
# User Tim Deegan <tim@xxxxxxx>
# Date 1333626954 -3600
# Node ID dfe9453c066f3fbfa09c847d7ec381cdc0da0f99
# Parent  5eeaa7b25a60327c48bf17472e9a00bdfc67378f
x86: fix logical ANDs used to mask bitfields.

Signed-off-by: Tim Deegan <tim@xxxxxxx>

diff -r 5eeaa7b25a60 -r dfe9453c066f xen/arch/x86/hvm/svm/svm.c
--- a/xen/arch/x86/hvm/svm/svm.c        Thu Apr 05 12:55:54 2012 +0100
+++ b/xen/arch/x86/hvm/svm/svm.c        Thu Apr 05 12:55:54 2012 +0100
@@ -752,7 +752,7 @@ static void svm_lwp_interrupt(struct cpu
     ack_APIC_irq();
     vlapic_set_irq(
         vcpu_vlapic(curr),
-        (curr->arch.hvm_svm.guest_lwp_cfg >> 40) && 0xff,
+        (curr->arch.hvm_svm.guest_lwp_cfg >> 40) & 0xff,
         0);
 }
 
diff -r 5eeaa7b25a60 -r dfe9453c066f xen/arch/x86/hvm/vmx/vmx.c
--- a/xen/arch/x86/hvm/vmx/vmx.c        Thu Apr 05 12:55:54 2012 +0100
+++ b/xen/arch/x86/hvm/vmx/vmx.c        Thu Apr 05 12:55:54 2012 +0100
@@ -1382,7 +1382,7 @@ void vmx_inject_extint(int trap)
     if ( nestedhvm_vcpu_in_guestmode(v) ) {
         pin_based_cntrl = __get_vvmcs(vcpu_nestedhvm(v).nv_vvmcx, 
                                      PIN_BASED_VM_EXEC_CONTROL);
-        if ( pin_based_cntrl && PIN_BASED_EXT_INTR_MASK ) {
+        if ( pin_based_cntrl & PIN_BASED_EXT_INTR_MASK ) {
             nvmx_enqueue_n2_exceptions (v, 
                INTR_INFO_VALID_MASK | (X86_EVENTTYPE_EXT_INTR<<8) | trap,
                HVM_DELIVER_NO_ERROR_CODE);
@@ -1401,7 +1401,7 @@ void vmx_inject_nmi(void)
     if ( nestedhvm_vcpu_in_guestmode(v) ) {
         pin_based_cntrl = __get_vvmcs(vcpu_nestedhvm(v).nv_vvmcx, 
                                      PIN_BASED_VM_EXEC_CONTROL);
-        if ( pin_based_cntrl && PIN_BASED_NMI_EXITING ) {
+        if ( pin_based_cntrl & PIN_BASED_NMI_EXITING ) {
             nvmx_enqueue_n2_exceptions (v, 
                INTR_INFO_VALID_MASK | (X86_EVENTTYPE_NMI<<8) | TRAP_nmi,
                HVM_DELIVER_NO_ERROR_CODE);

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