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[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [Xen-devel] [PATCH] x86/hpet: warn about and clear reserved set config register bits
Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx>
--- a/xen/arch/x86/hpet.c
+++ b/xen/arch/x86/hpet.c
@@ -755,6 +755,13 @@ void hpet_resume(u32 *boot_cfg)
if ( boot_cfg )
*boot_cfg = cfg;
cfg &= ~(HPET_CFG_ENABLE | HPET_CFG_LEGACY);
+ if ( cfg )
+ {
+ printk(XENLOG_WARNING
+ "HPET: reserved bits %#x set in global config register\n",
+ cfg);
+ cfg = 0;
+ }
hpet_write32(cfg, HPET_CFG);
hpet_id = hpet_read32(HPET_ID);
@@ -765,6 +772,13 @@ void hpet_resume(u32 *boot_cfg)
if ( boot_cfg )
boot_cfg[i + 1] = cfg;
cfg &= ~HPET_TN_ENABLE;
+ if ( cfg & HPET_TN_RESERVED )
+ {
+ printk(XENLOG_WARNING
+ "HPET: reserved bits %#x set in channel %u config
register\n",
+ cfg & HPET_TN_RESERVED, i);
+ cfg &= ~HPET_TN_RESERVED;
+ }
hpet_write32(cfg, HPET_Tn_CFG(i));
}
--- a/xen/arch/x86/hvm/hpet.c
+++ b/xen/arch/x86/hvm/hpet.c
@@ -42,7 +42,8 @@
(hvm_get_guest_time(vhpet_vcpu(hpet)) / STIME_PER_HPET_TICK)
#define HPET_TN_INT_ROUTE_CAP_SHIFT 32
-#define HPET_TN_CFG_BITS_READONLY_OR_RESERVED 0xffff80b1U
+#define HPET_TN_CFG_BITS_READONLY_OR_RESERVED (HPET_TN_RESERVED | \
+ HPET_TN_PERIODIC_CAP | HPET_TN_64BIT_CAP | HPET_TN_FSB_CAP)
/* can be routed to IOAPIC.redirect_table[23..20] */
#define HPET_TN_INT_ROUTE_CAP (0x00f00000ULL \
--- a/xen/include/asm-x86/hpet.h
+++ b/xen/include/asm-x86/hpet.h
@@ -43,6 +43,7 @@
#define HPET_TN_ROUTE 0x3e00
#define HPET_TN_FSB 0x4000
#define HPET_TN_FSB_CAP 0x8000
+#define HPET_TN_RESERVED 0xffff0081
#define HPET_TN_ROUTE_SHIFT 9
Attachment:
x86-hpet-clear-reserved-bits.patch _______________________________________________ Xen-devel mailing list Xen-devel@xxxxxxxxxxxxx http://lists.xen.org/xen-devel
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