Re: [Xen-devel] [PATCH] x86/AMD: fold redundant parameters of cpu_has_amd_erratum()

[Wei Huang <wei.huang2@xxxxxxx>]

Acked-by: Wei Huang <wei.huang2@xxxxxxx>

On 12/16/2011 10:55 AM, Boris Ostrovsky wrote:
> On 12/16/11 10:23, Jan Beulich wrote:
> > The boolean 'osvw' indicator and 'osvw_id' can be folded - the function
> > can as well distinguish the non-OSVW case by checking for a negative
> > 'osvw_id'. That way the whole variable argument list processing is only
> > needed on the legacy code path.
> >
> > Signed-off-by: Jan Beulich<jbeulich@xxxxxxxx>
> Acked-by: Boris Ostrovsky <boris.ostrovsky@xxxxxxx>
>
> > --- a/xen/arch/x86/cpu/amd.c
> > +++ b/xen/arch/x86/cpu/amd.c
> > @@ -186,7 +186,7 @@ static void __devinit set_cpuidmask(cons
> >    * Check for the presence of an AMD erratum. Arguments are defined 
> > in amd.h
> >    * for each known erratum. Return 1 if erratum is found.
> >    */
> > -int cpu_has_amd_erratum(const struct cpuinfo_x86 *cpu, int osvw, ...)
> > +int cpu_has_amd_erratum(const struct cpuinfo_x86 *cpu, int osvw_id, 
> > ...)
> >   {
> >       va_list ap;
> >       u32 range;
> > @@ -195,27 +195,24 @@ int cpu_has_amd_erratum(const struct cpu
> >       if (cpu->x86_vendor != X86_VENDOR_AMD)
> >           return 0;
> >
> > -    va_start(ap, osvw);
> > +    if (osvw_id>= 0&&  cpu_has(cpu, X86_FEATURE_OSVW)) {
> > +        u64 osvw_len;
> >
> > -    if (osvw) {
> > -        u16 osvw_id = va_arg(ap, int);
> > +        rdmsrl(MSR_AMD_OSVW_ID_LENGTH, osvw_len);
> >
> > -        if (cpu_has(cpu, X86_FEATURE_OSVW)) {
> > -            u64 osvw_len;
> > -            rdmsrl(MSR_AMD_OSVW_ID_LENGTH, osvw_len);
> > -
> > -            if (osvw_id<  osvw_len) {
> > -                u64 osvw_bits;
> > -                rdmsrl(MSR_AMD_OSVW_STATUS + (osvw_id>>  6),
> > -                       osvw_bits);
> > +        if (osvw_id<  osvw_len) {
> > +            u64 osvw_bits;
> >
> > -                va_end(ap);
> > -                return (osvw_bits>>  (osvw_id&  0x3f))&  0x01;
> > -            }
> > +            rdmsrl(MSR_AMD_OSVW_STATUS + (osvw_id>>  6),
> > +                   osvw_bits);
> > +
> > +            return (osvw_bits>>  (osvw_id&  0x3f))&  1;
> >           }
> >       }
> >
> >       /* OSVW unavailable or ID unknown, match family-model-stepping 
> > range */
> > +    va_start(ap, osvw_id);
> > +
> >       ms = (cpu->x86_model<<  4) | cpu->x86_mask;
> >       while ((range = va_arg(ap, int))) {
> >           if ((cpu->x86 == AMD_MODEL_RANGE_FAMILY(range))&&
> > --- a/xen/include/asm-x86/amd.h
> > +++ b/xen/include/asm-x86/amd.h
> > @@ -119,8 +119,8 @@
> >    *
> >    */
> >
> > -#define AMD_LEGACY_ERRATUM(...)         0 /* legacy */, __VA_ARGS__, 0
> > -#define AMD_OSVW_ERRATUM(osvw_id, ...)  1 /* osvw */, osvw_id, 
> > __VA_ARGS__, 0
> > +#define AMD_LEGACY_ERRATUM(...)         -1 /* legacy */, __VA_ARGS__, 0
> > +#define AMD_OSVW_ERRATUM(osvw_id, ...)  osvw_id, __VA_ARGS__, 0
> >   #define AMD_MODEL_RANGE(f, m_start, s_start, m_end, 
> > s_end)              \
> >       ((f<<  24) | (m_start<<  16) | (s_start<<  12) | (m_end<<  4) | 
> > (s_end))
> >   #define AMD_MODEL_RANGE_FAMILY(range)   (((range)>>  24)&  0xff)


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