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[Xen-devel] [PATCH More PCIFront]



This set of patches makes the Xen PCI frontend driver work
with MSI and MSI-X interrupts. In essence I've split the patches
in two camps: enabling MSI/MSI-X and disabling. I've also sprinkled
some other fixes amongst them.

The first patch is .. umm, one I already posted, but figured it might
be easier for Jeremy to ingest this whole e-mail thread than hunt a
specific one down:
 [PATCH 1/9] Fix compile error: error: too many arguments to function 
'pci_frontend_enable_msi'

The next one removes the first implementation I did for turning MSI on:
 [PATCH 2/9] Revert "To enable MSI devices in a non-privileged PV domain use 
pci_frontend_enable_msi."

And the next three make it possible to have MSI/MSI-X enabled with a more
general approach:
 [PATCH 3/9] Alter 'xen_create_msi_irq' to respect an PIRQ override when in 
non-privileged PV mode.
 [PATCH 4/9] Have pci_frontend_enable_[msi|msix] save PIRQ values in a int 
array.
 [PATCH 5/9] Pass PIRQ values obtained from pci_frontend_enable_[msi|msix] in 
xen_create_msi_irq.

A tiny little fix to make it more obvious which device is failing in the field:
 [PATCH 6/9] In xen-pcifront.c updated printk(KERN_ERR ... to dev_err macro.

And the next three for disabling MSI/MSI-X support:
 [PATCH 7/9] Copy-n-paste arch_teardown_msi_irqs from msi.c to io_apic.c.
 [PATCH 8/9] Provide a 'xen_teardown_msi_dev' function to be called by 
'arch_teardown_msi_irqs'.
 [PATCH 9/9] In pci_frontend_disable_msi do not alter the dev->irq.

With that, I've gotten MSI to work properly. MSI-X _should_ work as well, but
I do not have the hardware on hand to test this yet.

There is one issue for guest domains:
 - 4GB or more hangs it. When running xenctx it looks to be stuck in:
  [<ffffffff816b9043>] panic+0x1c0 
  [<ffffffff81013335>] xen_swiotlb_fixup+0x123 
  A bit of instrumentation shows tat xen_create_continugous_region fails:
        xen_swiotlb_fixup: messed up: ffff880020000000, size: 67108864, rc:-12

  So you don't even get:

 PCI: Warning: Cannot find a gap in the 32bit address range
 PCI: Unassigned devices with 32bit resource registers may break!


And for dom0:
 - No support yet for 'reassign_device' which page aligns the BARs
   on PCI devices.

 - Haven't tested FLR or PCI AER.

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