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Re: [Xen-devel] IRQ SMP affinity problems in domU with vcpus > 4 on HP ProLiant G6 with dual Xeon 5540 (Nehalem)

Thanks, applied as c/s 20370. I think fix-irq-affinity-msi3.patch is already
applied as c/s 20334.

 -- Keir

On 26/10/2009 13:02, "Zhang, Xiantao" <xiantao.zhang@xxxxxxxxx> wrote:

> Keir, 
>    The attached patch(irq-migration-enhancement.patch) targets to enhance irq
> migration logic, and the most logic is ported from Linux and tailored for Xen.
> Please apply, and it should eliminate the race between writing msi's vector
> and addr. In addition, to fix guest's interrupt affinity issue, we also needs
> to apply the patch(fix-irq-affinity-msi3.patch) .
> Xiantao
> Keir Fraser wrote:
>> On 22/10/2009 09:41, "Zhang, Xiantao" <xiantao.zhang@xxxxxxxxx> wrote:
>>>> Hmm, then I don't understand which case your patch was a fix for: I
>>>> understood that it addresses an issue when the affinity of an
>>>> interrupt gets changed (requiring a re-write of the address/data
>>>> pair). If the hypervisor can deal with it without masking, then why
>>>> did you add it?
>>> Hmm, sorry, seems I misunderstood your question. If the msi doesn't
>>> support mask bit(clearing MSI enable bit doesn't help in this case),
>>> the issue may still exist. Just checked Linux side, seems it doesn't
>>> perform mask operation when program MSI, but don't know why Linux
>>> hasn't such issues.  Actaully, we do see inconsisten interrupt
>>> message from the device without this patch, and after applying the
>>> patch, the issue is gone.  May need further investigation why Linux
>>> doesn't need the mask operation.
>> Linux is quite careful about when it will reprogram vector/affinity
>> info isn't it? Doesn't it mark such an update pending and only flush
>> it through during next interrupt delivery, or something like that? Do
>> we need some of the upstream Linux patches for this?
>>  -- Keir
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