Re: [Xen-devel] Re: [PATCH] CPUIDLE: revise tsc-save/restore to avoid big tsc skew between cpus

[Keir Fraser <keir.fraser@xxxxxxxxxxxxx>]

On 15/12/2008 13:28, "Wei, Gang" <gang.wei@xxxxxxxxx> wrote:

>>> Redo the constant_tsc & tsc_nostop check part and post it again.
>> 
>> I applied the bits outside time.c. For time.c itself, how about the simpler
>> attached alternative? Does it work well? :-)
> 
> Although it looks simpler & workable, but the practice shows it doesn't work.

Weird. I wonder if CPU TSCs aren't as synced as we'd like, and we're getting
a -ve TSC delta in get_s_time(). Perhaps setting the TSC MSR to
r->master_tsc_stamp in time_calibration_rendezvous() would avoid that.

 -- Keir



_______________________________________________
Xen-devel mailing list
Xen-devel@xxxxxxxxxxxxxxxxxxx
http://lists.xensource.com/xen-devel