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Re: [Xen-devel] HVM windows - PCI IRQ firing on both CPU's

  • To: James Harper <james.harper@xxxxxxxxxxxxxxxx>, <xen-devel@xxxxxxxxxxxxxxxxxxx>
  • From: Keir Fraser <keir.fraser@xxxxxxxxxxxxx>
  • Date: Mon, 18 Aug 2008 13:36:45 +0100
  • Cc:
  • Delivery-date: Mon, 18 Aug 2008 05:37:15 -0700
  • List-id: Xen developer discussion <xen-devel.lists.xensource.com>
  • Thread-index: AckBIKaFdOX6QU6hSgaQozLRUZxMrQACj3ysAABk+0AAAE37LgAACjswAABOb3E=
  • Thread-topic: [Xen-devel] HVM windows - PCI IRQ firing on both CPU's

On 18/8/08 13:32, "James Harper" <james.harper@xxxxxxxxxxxxxxxx> wrote:

> I'm not sure if this is a general or a windows specific question, but I
> can approach this in one of two ways...
> 1. Make sure the interrupt is only ever delivered to CPU0 by specifying
> the affinity when I call IoConnectInterrupt
> 2. Accept the interrupt on any CPU but always use vcpu_info[0] to check
> the flags etc.

(2) will suffice. It's what we do in Linux PV-on-HVM drivers.

> Does the hypervisor make any scheduling assumptions upon delivering an
> event to a domain? (eg does it schedule CPU0 on the basis that that CPU
> is going to be handling the event?)

No, the HVM interrupt emulation will cause the correct vcpu to be scheduled
(i.e., the one that the IOAPIC/PIC forwards the interrupt to). It's just
that the interrupt pin is hardwired to vcpu0's event-pending flag.

 -- Keir

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