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Re: [Xen-devel] [PATCH] Limit MCG Cap



Hi Keir -
Your suggestion to report 0 for reads of MSR_IA32_MCG_CAP seems to be working well on a wide variety of HVM guests (Windows & Linux, 32 & 64bit). I've attached a new patch.

Thanks,
Dave

This patch implements a suggestion of Keir's (in response to a patch of mine):

Intercept guest reads of MSR_IA32_MCG_CAP and report 0, indicating no machine check "units", which agrees more closely with Xen's super-minimal machine check architecture (just enough to allow Windows to run).

This fixes a bug that occurs when migrating a RHEL4-64bit guest to a host with fewer machine check units than the original host. These host physical details shouldn't be leaking through to guests.

Signed-off-by: David Lively <dlively@xxxxxxxxxxxxxxx>


Keir Fraser wrote:
Given that we don't properly virtualise/emulate machine check (we only set
the feature bit because some versions of Windows demand it) can we get away
with returning zero for reads of MCG_CAP?

 -- Keir

On 27/8/07 20:11, "Ben Guthro" <bguthro@xxxxxxxxxxxxxxx> wrote:

Intercept guest reads of MSR_IA32_MCG_CAP and limit the number of memory banks
reported to one.
This prevents us from trying to read status of non-existent banks when
migrated to a machine
with fewer banks.


diff -r 9f111c7d648f xen/arch/x86/hvm/svm/svm.c
--- a/xen/arch/x86/hvm/svm/svm.c        Tue Aug 28 22:40:01 2007 -0400
+++ b/xen/arch/x86/hvm/svm/svm.c        Tue Aug 28 22:40:01 2007 -0400
@@ -2058,6 +2058,9 @@ static inline void svm_do_msr_access(
              */
             msr_content = 0;
             break;
+        case MSR_IA32_MCG_CAP:
+            msr_content = 0;
+            break;
         default:
             if ( rdmsr_hypervisor_regs(ecx, &eax, &edx) ||
                  rdmsr_safe(ecx, eax, edx) == 0 )
diff -r 9f111c7d648f xen/arch/x86/hvm/vmx/vmx.c
--- a/xen/arch/x86/hvm/vmx/vmx.c        Tue Aug 28 22:40:01 2007 -0400
+++ b/xen/arch/x86/hvm/vmx/vmx.c        Tue Aug 28 22:40:01 2007 -0400
@@ -2554,6 +2554,9 @@ static inline int vmx_do_msr_read(struct
     case MSR_IA32_APICBASE:
         msr_content = vcpu_vlapic(v)->hw.apic_base_msr;
         break;
+    case MSR_IA32_MCG_CAP:
+        msr_content = 0;
+        break;
     default:
         if ( long_mode_do_msr_read(regs) )
             goto done;
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